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      1 /*
      2  * CDDL HEADER START
      3  *
      4  * The contents of this file are subject to the terms of the
      5  * Common Development and Distribution License (the "License").
      6  * You may not use this file except in compliance with the License.
      7  *
      8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
      9  * or http://www.opensolaris.org/os/licensing.
     10  * See the License for the specific language governing permissions
     11  * and limitations under the License.
     12  *
     13  * When distributing Covered Code, include this CDDL HEADER in each
     14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
     15  * If applicable, add the following below this CDDL HEADER, with the
     16  * fields enclosed by brackets "[]" replaced with your own identifying
     17  * information: Portions Copyright [yyyy] [name of copyright owner]
     18  *
     19  * CDDL HEADER END
     20  */
     21 
     22 /*
     23  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
     24  * Use is subject to license terms.
     25  */
     26 
     27 #pragma ident	"@(#)asm.h	1.11	09/05/26 SMI"
     28 
     29 #ifndef _DISKOASM_H
     30 #define	_DISKOASM_H
     31 
     32 #ifdef	__cplusplus
     33 extern "C" {
     34 #endif
     35 
     36 #ifdef __sparc
     37 #define	hi(A) (A >> 10)
     38 #define	lo(A) (A & 0x3ff)
     39 /*
     40  * All the registers.
     41  */
     42 #define	g0 0
     43 #define	g1 1
     44 #define	g2 2
     45 #define	g3 3
     46 #define	g4 4
     47 #define	g5 5
     48 #define	g6 6
     49 #define	g7 7
     50 #define	o0 8
     51 #define	o1 9
     52 #define	o2 10
     53 #define	o3 11
     54 #define	o4 12
     55 #define	o5 13
     56 #define	o6 14
     57 #define	o7 15
     58 #define	l0 16
     59 #define	l1 17
     60 #define	l2 18
     61 #define	l3 16
     62 #define	l4 20
     63 #define	l5 21
     64 #define	l6 22
     65 #define	l7 23
     66 #define	i0 24
     67 #define	i1 25
     68 #define	i2 26
     69 #define	i3 27
     70 #define	i4 28
     71 #define	i5 29
     72 #define	i6 30
     73 #define	i7 31
     74 #define	sp o6
     75 #define	fp i6
     76 /*
     77  * The synthetic instructions are just macros
     78  */
     79 #define	ret_asm() jmpl_asm(g0, i7, 1, 0x8)
     80 #define	retl_asm() jmpl_asm(g0, o7, 1, 0x8)
     81 /*
     82  * All the instructions this program needs to be able to write.
     83  */
     84 #define	nop_asm() 0x01000000
     85 uint_t add_asm(ushort_t rd, ushort_t rs1, char i, ushort_t x);
     86 uint_t sllx_asm(ushort_t rd, ushort_t rs1, ushort_t cnt);
     87 uint_t sethi_asm(ushort_t const22, ushort_t rd);
     88 uint_t jmpl_asm(ushort_t rd, ushort_t rs1, char i, ushort_t x);
     89 uint_t ba_asm(char a, uint_t x);
     90 uint_t bn_asm(char a, uint_t x);
     91 uint_t save_asm(ushort_t rd, ushort_t rs1, char i, ushort_t x);
     92 uint_t restore_asm(ushort_t rd, ushort_t rs1, char i, ushort_t x);
     93 
     94 #else /* Intel */
     95 
     96 /*
     97  * Registers, values as per the +rd nomenclature.
     98  */
     99 
    100 #define	eax ((ushort_t)0)
    101 #define	ecx ((ushort_t)1)
    102 #define	edx ((ushort_t)2)
    103 #define	ebx ((ushort_t)3)
    104 #define	esp ((ushort_t)4)
    105 #define	ebp ((ushort_t)5)
    106 #define	esi ((ushort_t)6)
    107 #define	edi ((ushort_t)7)
    108 
    109 #define	rax ((ushort_t)0)
    110 #define	rdx ((ushort_t)2)
    111 
    112 #define	NOP	((ushort_t)0x90) /* NOP opcode */
    113 #define	NOPWORD ((uint32_t)0x90909090)
    114 
    115 #define	nop_asm() NOPWORD
    116 #if defined(__amd64)
    117 #define	save_asm()  ((uint32_t)0xe5894855)
    118 #define	call_asm()  ((uint32_t)0xd2ff9090)
    119 #define	ret_asm()   ((uint32_t)0xc3c99090)
    120 #else
    121 #define	ret_asm()   ((uint32_t)0xc3c99090)
    122 #define	save_asm()  ((uint32_t)0xec8b5590)
    123 #define	call_asm()  ((uint32_t)0xd0ff9090)
    124 #endif
    125 #define	add_asm(ib, reg) \
    126 	((uint32_t)0x9000c083) | ((uint32_t)reg << 8) | ((uint32_t)ib << 16)
    127 
    128 /*
    129  * Handy bitmasks, specifically verbose for clarity.
    130  */
    131 
    132 #define	BITS24_31 ((uint32_t)0xFF000000)
    133 #define	BITS16_23 ((uint32_t)0x00FF0000)
    134 #define	BITS8_15 ((uint32_t)0x0000FF00)
    135 #define	BITS0_7 ((uint32_t)0x000000FF)
    136 
    137 #define	UPPER32(A) (A >> 32)
    138 #define	LOWER32(A) (A & 0xffffffff)
    139 
    140 /*
    141  * Specifically make varlen stand out from the tmp variable
    142  * used in some of the buf routines simply for clarity. This
    143  * variable is required as some of the Intel assembler is
    144  * greater than 32 bits but, for ease of porting it is
    145  * handy to still handle 32 bit quantities.
    146  */
    147 
    148 #if defined __amd64
    149 
    150 typedef union {
    151 	uint64_t	sixtyfour;
    152 	uint32_t	thirtytwo[3];
    153 } varlen;
    154 
    155 extern varlen mov32_asm(uint32_t imm32, ushort_t reg);
    156 extern varlen movl_asm(uint64_t, ushort_t);
    157 extern varlen pushl_asm(uint32_t);
    158 extern varlen jmp_asm(uint32_t);
    159 #elif defined __i386
    160 
    161 typedef union {
    162 	uint64_t	sixtyfour;
    163 	uint32_t	thirtytwo[2];
    164 } varlen;
    165 
    166 extern varlen movl_asm(uint32_t, ushort_t);
    167 extern varlen pushl_asm(uint32_t);
    168 extern varlen jmp_asm(uint32_t);
    169 #else
    170 #error "unknown processor type
    171 #endif
    172 
    173 #endif /* Intel */
    174 
    175 #ifdef	__cplusplus
    176 }
    177 #endif
    178 
    179 #endif /* _DISKOASM_H */
    180