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      1 /*
      2  * CDDL HEADER START
      3  *
      4  * The contents of this file are subject to the terms of the
      5  * Common Development and Distribution License (the "License").
      6  * You may not use this file except in compliance with the License.
      7  *
      8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
      9  * or http://www.opensolaris.org/os/licensing.
     10  * See the License for the specific language governing permissions
     11  * and limitations under the License.
     12  *
     13  * When distributing Covered Code, include this CDDL HEADER in each
     14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
     15  * If applicable, add the following below this CDDL HEADER, with the
     16  * fields enclosed by brackets "[]" replaced with your own identifying
     17  * information: Portions Copyright [yyyy] [name of copyright owner]
     18  *
     19  * CDDL HEADER END
     20  */
     21 /*
     22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
     23  * Use is subject to license terms.
     24  */
     25 
     26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
     27 
     28 #if !defined(lint)
     29 #include "assym.h"
     30 #endif
     31 
     32 /*
     33  * Niagara processor specific assembly routines
     34  */
     35 
     36 #include <sys/asm_linkage.h>
     37 #include <sys/machasi.h>
     38 #include <sys/machparam.h>
     39 #include <sys/hypervisor_api.h>
     40 #include <sys/niagararegs.h>
     41 #include <sys/machasi.h>
     42 #include <sys/niagaraasi.h>
     43 #include <vm/hat_sfmmu.h>
     44 
     45 #if defined(lint)
     46 /*ARGSUSED*/
     47 uint64_t
     48 hv_niagara_getperf(uint64_t perfreg, uint64_t *datap)
     49 { return (0); }
     50 
     51 /*ARGSUSED*/
     52 uint64_t
     53 hv_niagara_setperf(uint64_t perfreg, uint64_t data)
     54 { return (0); }
     55 
     56 #else   /* lint */
     57 
     58 	/*
     59 	 * hv_niagara_getperf(uint64_t perfreg, uint64_t *datap)
     60 	 */
     61 	ENTRY(hv_niagara_getperf)
     62 	mov	%o1, %o4			! save datap
     63 	mov	HV_NIAGARA_GETPERF, %o5
     64 	ta	FAST_TRAP
     65 	brz,a	%o0, 1f
     66 	stx	%o1, [%o4]
     67 1:
     68 	retl
     69 	nop
     70 	SET_SIZE(hv_niagara_getperf)
     71 
     72 	/*
     73 	 * hv_niagara_setperf(uint64_t perfreg, uint64_t data)
     74 	 */
     75 	ENTRY(hv_niagara_setperf)
     76 	mov	HV_NIAGARA_SETPERF, %o5
     77 	ta	FAST_TRAP
     78 	retl
     79 	nop
     80 	SET_SIZE(hv_niagara_setperf)
     81 
     82 #endif /* !lint */
     83 
     84 #if defined (lint)
     85 /*
     86  * Invalidate all of the entries within the TSB, by setting the inv bit
     87  * in the tte_tag field of each tsbe.
     88  *
     89  * We take advantage of the fact that the TSBs are page aligned and a
     90  * multiple of PAGESIZE to use ASI_BLK_INIT_xxx ASI.
     91  *
     92  * See TSB_LOCK_ENTRY and the miss handlers for how this works in practice
     93  * (in short, we set all bits in the upper word of the tag, and we give the
     94  * invalid bit precedence over other tag bits in both places).
     95  */
     96 /*ARGSUSED*/
     97 void
     98 cpu_inv_tsb(caddr_t tsb_base, uint_t tsb_bytes)
     99 {}
    100 
    101 #else /* lint */
    102 
    103 	ENTRY(cpu_inv_tsb)
    104 
    105 	/*
    106 	 * The following code assumes that the tsb_base (%o0) is 256 bytes
    107 	 * aligned and the tsb_bytes count is multiple of 256 bytes.
    108 	 */
    109 
    110 	wr	%g0, ASI_BLK_INIT_ST_QUAD_LDD_P, %asi
    111 	set	TSBTAG_INVALID, %o2
    112 	sllx	%o2, 32, %o2		! INV bit in upper 32 bits of the tag
    113 1:
    114 	stxa	%o2, [%o0+0x0]%asi
    115 	stxa	%o2, [%o0+0x40]%asi
    116 	stxa	%o2, [%o0+0x80]%asi
    117 	stxa	%o2, [%o0+0xc0]%asi
    118 
    119 	stxa	%o2, [%o0+0x10]%asi
    120 	stxa	%o2, [%o0+0x20]%asi
    121 	stxa	%o2, [%o0+0x30]%asi
    122 
    123 	stxa	%o2, [%o0+0x50]%asi
    124 	stxa	%o2, [%o0+0x60]%asi
    125 	stxa	%o2, [%o0+0x70]%asi
    126 
    127 	stxa	%o2, [%o0+0x90]%asi
    128 	stxa	%o2, [%o0+0xa0]%asi
    129 	stxa	%o2, [%o0+0xb0]%asi
    130 
    131 	stxa	%o2, [%o0+0xd0]%asi
    132 	stxa	%o2, [%o0+0xe0]%asi
    133 	stxa	%o2, [%o0+0xf0]%asi
    134 
    135 	subcc	%o1, 0x100, %o1
    136 	bgu,pt	%ncc, 1b
    137 	add	%o0, 0x100, %o0
    138 
    139 	membar	#Sync
    140 	retl
    141 	nop
    142 
    143 	SET_SIZE(cpu_inv_tsb)
    144 #endif /* lint */
    145 
    146 #if defined(lint)
    147 /*ARGSUSED*/
    148 uint64_t
    149 hv_niagara_mmustat_conf(uint64_t buf, uint64_t *prev_buf)
    150 { return (0); }
    151 
    152 /*ARGSUSED*/
    153 uint64_t
    154 hv_niagara_mmustat_info(uint64_t *buf)
    155 { return (0); }
    156 
    157 #else   /* lint */
    158 
    159 	/*
    160 	 * hv_niagara_mmustat_conf(uint64_t buf, uint64_t *prev_buf)
    161 	 */
    162 	ENTRY(hv_niagara_mmustat_conf)
    163 	mov	%o1, %o4			! save prev_buf
    164 	mov	HV_NIAGARA_MMUSTAT_CONF, %o5
    165 	ta	FAST_TRAP
    166 	retl
    167 	stx	%o1, [%o4]
    168 	SET_SIZE(hv_niagara_mmustat_conf)
    169 
    170 	/*
    171 	 * hv_niagara_mmustat_info(uint64_t *buf)
    172 	 */
    173 	ENTRY(hv_niagara_mmustat_info)
    174 	mov	%o0, %o4			! save buf
    175 	mov	HV_NIAGARA_MMUSTAT_INFO, %o5
    176 	ta	FAST_TRAP
    177 	retl
    178 	stx	%o1, [%o4]
    179 	SET_SIZE(hv_niagara_mmustat_info)
    180 
    181 #endif /* !lint */
    182