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      1 /*
      2  * CDDL HEADER START
      3  *
      4  * The contents of this file are subject to the terms of the
      5  * Common Development and Distribution License (the "License").
      6  * You may not use this file except in compliance with the License.
      7  *
      8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
      9  * or http://www.opensolaris.org/os/licensing.
     10  * See the License for the specific language governing permissions
     11  * and limitations under the License.
     12  *
     13  * When distributing Covered Code, include this CDDL HEADER in each
     14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
     15  * If applicable, add the following below this CDDL HEADER, with the
     16  * fields enclosed by brackets "[]" replaced with your own identifying
     17  * information: Portions Copyright [yyyy] [name of copyright owner]
     18  *
     19  * CDDL HEADER END
     20  */
     21 /*	Copyright (c) 1990, 1991 UNIX System Laboratories, Inc.	*/
     22 /*	Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T	*/
     23 /*	  All Rights Reserved 	*/
     24 
     25 /*
     26  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
     27  * Use is subject to license terms.
     28  */
     29 
     30 #ifndef	_SYS_SUDEV_H
     31 #define	_SYS_SUDEV_H
     32 
     33 #pragma ident	"%Z%%M%	%I%	%E% SMI"
     34 
     35 #ifdef __cplusplus
     36 extern "C" {
     37 #endif
     38 
     39 #include <sys/tty.h>
     40 #include <sys/ksynch.h>
     41 #include <sys/dditypes.h>
     42 #include <sys/types.h>
     43 #include <sys/kstat.h>
     44 
     45 /*
     46  * Definitions for INS8250 / 16550  chips
     47  */
     48 
     49 /* defined as offsets from the data register */
     50 #define	DAT		0 	/* receive/transmit data */
     51 #define	ICR		1  	/* interrupt control register */
     52 #define	ISR		2   	/* interrupt status register */
     53 #define	LCR		3   	/* line control register */
     54 #define	MCR		4   	/* modem control register */
     55 #define	LSR		5   	/* line status register */
     56 #define	MSR		6   	/* modem status register */
     57 #define	SPR		7   	/* scratchpad register for ST16C554D */
     58 #define	DLL		0   	/* divisor latch (lsb) */
     59 #define	DLH		1   	/* divisor latch (msb) */
     60 #define	FIFOR		ISR	/* FIFO register for 16550 */
     61 #define	OUTB(offset, value)	ddi_put8(asy->asy_handle, \
     62 				    asy->asy_ioaddr+offset, value)
     63 #define	INB(offset)	ddi_get8(asy->asy_handle, asy->asy_ioaddr+offset)
     64 
     65 /*
     66  * INTEL 8210-A/B & 16450/16550 Registers Structure.
     67  */
     68 
     69 /* Line Control Register */
     70 #define	WLS0		0x01	/* word length select bit 0 */
     71 #define	WLS1		0x02	/* word length select bit 2 */
     72 #define	STB		0x04	/* number of stop bits */
     73 #define	PEN		0x08	/* parity enable */
     74 #define	EPS		0x10	/* even parity select */
     75 #define	SETBREAK 	0x40	/* break key */
     76 #define	DLAB		0x80	/* divisor latch access bit */
     77 #define	RXLEN   	0x03   	/* # of data bits per received/xmitted char */
     78 #define	STOP1   	0x00
     79 #define	STOP2   	0x04
     80 #define	PAREN   	0x08
     81 #define	PAREVN  	0x10
     82 #define	PARMARK 	0x20
     83 #define	SNDBRK  	0x40
     84 
     85 
     86 #define	BITS5		0x00	/* 5 bits per char */
     87 #define	BITS6		0x01	/* 6 bits per char */
     88 #define	BITS7		0x02	/* 7 bits per char */
     89 #define	BITS8		0x03	/* 8 bits per char */
     90 
     91 /* baud rate definitions */
     92 #define	ASY110		1047	/* 110 baud rate for serial console */
     93 #define	ASY150		768	/* 150 baud rate for serial console */
     94 #define	ASY300		384	/* 300 baud rate for serial console */
     95 #define	ASY600		192	/* 600 baud rate for serial console */
     96 #define	ASY1200		96	/* 1200 baud rate for serial console */
     97 #define	ASY2400		48	/* 2400 baud rate for serial console */
     98 #define	ASY4800		24	/* 4800 baud rate for serial console */
     99 #define	ASY9600		12	/* 9600 baud rate for serial console */
    100 
    101 /* Line Status Register */
    102 #define	RCA		0x01	/* data ready */
    103 #define	OVRRUN		0x02	/* overrun error */
    104 #define	PARERR		0x04	/* parity error */
    105 #define	FRMERR		0x08	/* framing error */
    106 #define	BRKDET  	0x10	/* a break has arrived */
    107 #define	XHRE		0x20	/* tx hold reg is now empty */
    108 #define	XSRE		0x40	/* tx shift reg is now empty */
    109 #define	RFBE		0x80	/* rx FIFO Buffer error */
    110 
    111 /* Interrupt Id Regisger */
    112 #define	MSTATUS		0x00	/* modem status changed */
    113 #define	NOINTERRUPT	0x01	/* no interrupt pending */
    114 #define	TxRDY		0x02	/* Transmitter Holding Register Empty */
    115 #define	RxRDY		0x04	/* Receiver Data Available */
    116 #define	FFTMOUT 	0x0c	/* FIFO timeout - 16550AF */
    117 #define	RSTATUS 	0x06	/* Receiver Line Status */
    118 
    119 /* Interrupt Enable Register */
    120 #define	RIEN		0x01	/* Received Data Ready */
    121 #define	TIEN		0x02	/* Tx Hold Register Empty */
    122 #define	SIEN		0x04	/* Receiver Line Status */
    123 #define	MIEN		0x08	/* Modem Status */
    124 
    125 /* Modem Control Register */
    126 #define	DTR		0x01	/* Data Terminal Ready */
    127 #define	RTS		0x02	/* Request To Send */
    128 #define	OUT1		0x04	/* Aux output - not used */
    129 #define	OUT2		0x08	/* dis/enable int per INO on ALI1535D+ */
    130 #define	ASY_LOOP	0x10	/* loopback for diagnostics */
    131 
    132 /* Modem Status Register */
    133 #define	DCTS		0x01	/* Delta Clear To Send */
    134 #define	DDSR		0x02	/* Delta Data Set Ready */
    135 #define	DRI		0x04	/* Trail Edge Ring Indicator */
    136 #define	DDCD		0x08	/* Delta Data Carrier Detect */
    137 #define	CTS		0x10	/* Clear To Send */
    138 #define	DSR		0x20	/* Data Set Ready */
    139 #define	RI		0x40	/* Ring Indicator */
    140 #define	DCD		0x80	/* Data Carrier Detect */
    141 
    142 #define	DELTAS(x)	((x)&(DCTS|DDSR|DRI|DDCD))
    143 #define	STATES(x)	((x)(CTS|DSR|RI|DCD))
    144 
    145 /* flags for FCR (FIFO Control register) */
    146 #define	FIFO_OFF	0x00	/* fifo disabled */
    147 #define	FIFO_ON		0x01	/* fifo enabled */
    148 #define	FIFOEN		0x8f	/* fifo enabled, w/ 8 byte trigger */
    149 #define	FIFORCLR	0x8b	/* Clear receiver FIFO only */
    150 
    151 #define	FIFORXFLSH	0x02	/* flush receiver FIFO */
    152 #define	FIFOTXFLSH	0x04	/* flush transmitter FIFO */
    153 #define	FIFODMA		0x08	/* DMA mode 1 */
    154 #define	FIFO_TRIG_1	0x00	/* 1 byte trigger level */
    155 #define	FIFO_TRIG_4	0x40	/* 4 byte trigger level */
    156 #define	FIFO_TRIG_8	0x80	/* 8 byte trigger level */
    157 #define	FIFO_TRIG_14	0xC0	/* 14 byte trigger level */
    158 
    159 /*
    160  * Defines for ioctl calls (VP/ix)
    161  */
    162 
    163 #define	AIOC		('A'<<8)
    164 #define	AIOCINTTYPE	(AIOC|60)	/* set interrupt type */
    165 #define	AIOCDOSMODE	(AIOC|61)	/* set DOS mode */
    166 #define	AIOCNONDOSMODE	(AIOC|62)	/* reset DOS mode */
    167 #define	AIOCSERIALOUT	(AIOC|63)	/* serial device data write */
    168 #define	AIOCSERIALIN	(AIOC|64)	/* serial device data read */
    169 #define	AIOCSETSS	(AIOC|65)	/* set start/stop chars */
    170 #define	AIOCINFO	(AIOC|66)	/* tell usr what device we are */
    171 
    172 /* Ioctl alternate names used by VP/ix */
    173 #define	VPC_SERIAL_DOS		AIOCDOSMODE
    174 #define	VPC_SERIAL_NONDOS	AIOCNONDOSMODE
    175 #define	VPC_SERIAL_INFO		AIOCINFO
    176 #define	VPC_SERIAL_OUT		AIOCSERIALOUT
    177 #define	VPC_SERIAL_IN		AIOCSERIALIN
    178 
    179 /* Serial in/out requests */
    180 #define	SO_DIVLLSB	1
    181 #define	SO_DIVLMSB	2
    182 #define	SO_LCR		3
    183 #define	SO_MCR		4
    184 #define	SI_MSR		1
    185 #define	SIO_MASK(elem)		(1<<((elem)-1))
    186 
    187 #define	OVERRUN		040000
    188 #define	FRERROR		020000
    189 #define	PERROR		010000
    190 #define	S_ERRORS	(PERROR|OVERRUN|FRERROR)
    191 
    192 /*
    193  * Ring buffer and async line management definitions.
    194  */
    195 #define	RINGBITS	16		/* # of bits in ring ptrs */
    196 #define	RINGSIZE	(1<<RINGBITS)   /* size of ring */
    197 #define	RINGMASK	(RINGSIZE-1)
    198 #define	RINGFRAC	12		/* fraction of ring to force flush */
    199 
    200 #define	RING_INIT(ap)  ((ap)->async_rput = (ap)->async_rget = 0)
    201 #define	RING_CNT(ap)   (((ap)->async_rput - (ap)->async_rget) & RINGMASK)
    202 #define	RING_FRAC(ap)  ((int)RING_CNT(ap) >= (int)(RINGSIZE/RINGFRAC))
    203 #define	RING_POK(ap, n) ((int)RING_CNT(ap) < (int)(RINGSIZE-(n)))
    204 #define	RING_PUT(ap, c) \
    205 	((ap)->async_ring[(ap)->async_rput++ & RINGMASK] =  (uchar_t)(c))
    206 #define	RING_UNPUT(ap) ((ap)->async_rput--)
    207 #define	RING_GOK(ap, n) ((int)RING_CNT(ap) >= (int)(n))
    208 #define	RING_GET(ap)   ((ap)->async_ring[(ap)->async_rget++ & RINGMASK])
    209 #define	RING_EAT(ap, n) ((ap)->async_rget += (n))
    210 #define	RING_MARK(ap, c, s) \
    211 	((ap)->async_ring[(ap)->async_rput++ & RINGMASK] = ((uchar_t)(c)|(s)))
    212 #define	RING_UNMARK(ap) \
    213 	((ap)->async_ring[((ap)->async_rget) & RINGMASK] &= ~S_ERRORS)
    214 #define	RING_ERR(ap, c) \
    215 	((ap)->async_ring[((ap)->async_rget) & RINGMASK] & (c))
    216 
    217 /*
    218  * Serial kstats structure and macro to increment an individual kstat
    219  */
    220 struct serial_kstats {
    221 		kstat_named_t	ringover;	/* ring buffer overflow */
    222 		kstat_named_t	siloover;	/* silo overflow */
    223 };
    224 
    225 #define	INC64_KSTAT(asy, stat) (asy)->kstats.stat.value.ui64++;
    226 
    227 /*
    228  * Hardware channel common data. One structure per port.
    229  * Each of the fields in this structure is required to be protected by a
    230  * mutex lock at the highest priority at which it can be altered.
    231  * The asy_flags, and asy_next fields can be altered by interrupt
    232  * handling code that must be protected by the mutex whose handle is
    233  * stored in asy_excl_hi.  All others can be protected by the asy_excl
    234  * mutex, which is lower priority and adaptive.
    235  */
    236 struct asycom {
    237 	int		asy_flags;	/* random flags  */
    238 					/* protected by asy_excl_hi lock */
    239 	uint_t		asy_hwtype;	/* HW type: ASY82510, etc. */
    240 	uint_t		asy_use_fifo;	/* HW FIFO use it or not ?? */
    241 	uint_t		asy_fifo_buf;	/* With FIFO = 16, otherwise = 1 */
    242 	uchar_t		*asy_ioaddr;	/* i/o address of ASY port */
    243 	uint_t		asy_vect;	/* IRQ number */
    244 	boolean_t	suspended;	/* TRUE if driver suspended */
    245 	caddr_t		asy_priv;	/* protocol private data */
    246 	dev_info_t	*asy_dip;	/* dev_info */
    247 	long		asy_unit;	/* which port */
    248 	ddi_iblock_cookie_t asy_iblock;
    249 	kmutex_t	*asy_excl;	/* asy adaptive mutex */
    250 	kmutex_t	*asy_excl_hi;	/* asy spinlock mutex */
    251 	ddi_acc_handle_t asy_handle;    /* ddi_get/put handle */
    252 	ushort_t	asy_rsc_console;	/* RSC console port */
    253 	ushort_t	asy_rsc_control;	/* RSC control port */
    254 	ushort_t	asy_lom_console;	/* LOM console port */
    255 	uint_t		asy_xmit_count;	/* Count the no of xmits in one intr */
    256 	uint_t		asy_out_of_band_xmit; /* Out of band xmission */
    257 	uint_t		asy_rx_count;	/* No. of bytes rx'eved in one intr */
    258 	uchar_t		asy_device_type; /* Currently used for this device */
    259 	uchar_t		asy_trig_level;	/* Receive FIFO trig level */
    260 	kmutex_t	*asy_soft_lock;	/* soft lock for gaurding softpend. */
    261 	int		asysoftpend;	/* Flag indicating soft int pending. */
    262 	ddi_softintr_t asy_softintr_id;
    263 	ddi_iblock_cookie_t asy_soft_iblock;
    264 	int		asy_baud_divisor_factor; /* for different chips */
    265 	int		asy_ocflags; /* old cflags used in asy_program() */
    266 	uint_t		asy_cached_msr; /* a cache for the MSR register */
    267 	int		asy_speed_cap; /* maximum baud rate */
    268 	kstat_t		*sukstat;	/* ptr to serial kstats */
    269 	struct serial_kstats kstats;	/* serial kstats structure */
    270 	boolean_t	inperim;	/* in streams q perimeter */
    271 	cons_polledio_t polledio;	/* polled IO functios */
    272 	uchar_t		polled_icr;	/* the value of ICR on start of poll */
    273 	boolean_t	polled_enter;	/* if asy_polled_enter was called */
    274 };
    275 
    276 /*
    277  * Asychronous protocol private data structure for ASY.
    278  * Each of the fields in the structure is required to be protected by
    279  * the lower priority lock except the fields that are set only at
    280  * base level but cleared (with out lock) at interrupt level.
    281  */
    282 struct asyncline {
    283 	int		async_flags;	/* random flags */
    284 	kcondvar_t	async_flags_cv; /* condition variable for flags */
    285 	dev_t		async_dev;	/* device major/minor numbers */
    286 	mblk_t		*async_xmitblk;	/* transmit: active msg block */
    287 	struct asycom	*async_common;	/* device common data */
    288 	tty_common_t 	async_ttycommon; /* tty driver common data */
    289 	bufcall_id_t	async_wbufcid;	/* id for pending write-side bufcall */
    290 	timeout_id_t	async_polltid;	/* softint poll timeout id */
    291 
    292 	/*
    293 	 * The following fields are protected by the asy_excl_hi lock.
    294 	 * Some, such as async_flowc, are set only at the base level and
    295 	 * cleared (without the lock) only by the interrupt level.
    296 	 */
    297 	uchar_t		*async_optr;	/* output pointer */
    298 	int		async_ocnt;	/* output count */
    299 	uint_t		async_rput;	/* producing pointer for input */
    300 	uint_t		async_rget;	/* consuming pointer for input */
    301 	uchar_t		async_flowc;	/* flow control char to send */
    302 
    303 	/*
    304 	 * Each character stuffed into the ring has two bytes associated
    305 	 * with it.  The first byte is used to indicate special conditions
    306 	 * and the second byte is the actual data.  The ring buffer
    307 	 * needs to be defined as ushort_t to accomodate this.
    308 	 */
    309 	ushort_t	async_ring[RINGSIZE];
    310 
    311 	short		async_break;	/* break count */
    312 
    313 	union {
    314 		struct {
    315 			uchar_t _hw;	/* overrun (hw) */
    316 			uchar_t _sw;	/* overrun (sw) */
    317 		} _a;
    318 		ushort_t uover_overrun;
    319 	} async_uover;
    320 #define	async_overrun		async_uover._a.uover_overrun
    321 #define	async_hw_overrun	async_uover._a._hw
    322 #define	async_sw_overrun	async_uover._a._sw
    323 	short		async_ext;	/* modem status change count */
    324 	short		async_work;	/* work to do flag */
    325 	uchar_t		async_queue_full; /* Streams Queue Full */
    326 	uchar_t		async_ringbuf_overflow; /* when ring buffer overflows */
    327 	timeout_id_t	async_timer;	/* close drain progress timer */
    328 };
    329 
    330 /* definitions for async_flags field */
    331 #define	ASYNC_EXCL_OPEN	 0x10000000	/* exclusive open */
    332 #define	ASYNC_WOPEN	 0x00000001	/* waiting for open to complete */
    333 #define	ASYNC_ISOPEN	 0x00000002	/* open is complete */
    334 #define	ASYNC_OUT	 0x00000004	/* line being used for dialout */
    335 #define	ASYNC_CARR_ON	 0x00000008	/* carrier on last time we looked */
    336 #define	ASYNC_STOPPED	 0x00000010	/* output is stopped */
    337 #define	ASYNC_DELAY	 0x00000020	/* waiting for delay to finish */
    338 #define	ASYNC_BREAK	 0x00000040	/* waiting for break to finish */
    339 #define	ASYNC_BUSY	 0x00000080	/* waiting for transmission to finish */
    340 #define	ASYNC_DRAINING	 0x00000100	/* waiting for output to drain */
    341 #define	ASYNC_SERVICEIMM 0x00000200	/* queue soft interrupt as soon as */
    342 #define	ASYNC_HW_IN_FLOW 0x00000400	/* input flow control in effect */
    343 #define	ASYNC_HW_OUT_FLW 0x00000800	/* output flow control in effect */
    344 #define	ASYNC_PROGRESS	 0x00001000	/* made progress on output effort */
    345 #define	ASYNC_CLOSING	 0x00002000	/* closing the stream */
    346 
    347 /* asy_hwtype definitions */
    348 #define	ASY82510	0x1
    349 #define	ASY16550AF	0x2
    350 #define	ASY8250		0x3		/* 8250 or 16450 or 16550 */
    351 #define	ASY16C554D	0x4		/* ST16C554D */
    352 
    353 /* definitions for asy_flags field */
    354 #define	ASY_NEEDSOFT	0x00000001
    355 #define	ASY_DOINGSOFT	0x00000002
    356 #define	ASY_PPS		0x00000004
    357 #define	ASY_PPS_EDGE	0x00000008
    358 #define	ASY_IGNORE_CD	0x00000040
    359 
    360 /*
    361  * Different devices this driver supports and what it is used to drive
    362  * currently
    363  */
    364 #define	ASY_KEYBOARD 	0x01
    365 #define	ASY_MOUSE	0x02
    366 #define	ASY_SERIAL	0x03
    367 
    368 /*
    369  * RSC_DEVICE defines the bit in the minor device number that specifies
    370  * the tty line is to be used for console/controlling a RSC device.
    371  */
    372 #define	RSC_DEVICE	(1 << (NBITSMINOR32 - 4))
    373 
    374 /*
    375  * OUTLINE defines the high-order flag bit in the minor device number that
    376  * controls use of a tty line for dialin and dialout simultaneously.
    377  */
    378 #define	OUTLINE		(1 << (NBITSMINOR32 - 1))
    379 #define	UNIT(x)		(getminor(x) & ~(OUTLINE | RSC_DEVICE))
    380 
    381 /* suggested number of soft state instances */
    382 #define	SU_INITIAL_SOFT_ITEMS	0x02
    383 
    384 /*
    385  * ASYSETSOFT macro to pend a soft interrupt if one isn't already pending.
    386  */
    387 
    388 #define	ASYSETSOFT(asy)	{		\
    389 	if (mutex_tryenter(asy->asy_soft_lock)) {	\
    390 		asy->asy_flags |= ASY_NEEDSOFT;	\
    391 		if (!asy->asysoftpend) {		\
    392 			asy->asysoftpend = 1;	\
    393 			mutex_exit(asy->asy_soft_lock);\
    394 			ddi_trigger_softintr(asy->asy_softintr_id);\
    395 		} else					\
    396 			mutex_exit(asy->asy_soft_lock);\
    397 	}						\
    398 }
    399 
    400 #ifdef __cplusplus
    401 }
    402 #endif
    403 
    404 #endif	/* _SYS_SUDEV_H */
    405