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      1 /*
      2  * CDDL HEADER START
      3  *
      4  * The contents of this file are subject to the terms of the
      5  * Common Development and Distribution License (the "License").
      6  * You may not use this file except in compliance with the License.
      7  *
      8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
      9  * or http://www.opensolaris.org/os/licensing.
     10  * See the License for the specific language governing permissions
     11  * and limitations under the License.
     12  *
     13  * When distributing Covered Code, include this CDDL HEADER in each
     14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
     15  * If applicable, add the following below this CDDL HEADER, with the
     16  * fields enclosed by brackets "[]" replaced with your own identifying
     17  * information: Portions Copyright [yyyy] [name of copyright owner]
     18  *
     19  * CDDL HEADER END
     20  */
     21 /*
     22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
     23  * Use is subject to license terms.
     24  */
     25 
     26 #ifndef _SYS_PX_FM_H
     27 #define	_SYS_PX_FM_H
     28 
     29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
     30 
     31 #ifdef	__cplusplus
     32 extern "C" {
     33 #endif
     34 
     35 #define	PX_ERR_PIL	14
     36 #define	PX_ERR_LOW_PIL  9
     37 
     38 /*
     39  * Error handlers maybe called due to trap or interrupts
     40  * occured.
     41  */
     42 #define	PX_TRAP_CALL	0
     43 #define	PX_INTR_CALL	1
     44 #define	PX_LIB_CALL	2
     45 
     46 /*
     47  * Definition of Fire internal error severity -
     48  * HW Reset     Errors that cause hardware to automatically reset. Software is
     49  *              being reset along, sticky status bits need to be cleaned up upon
     50  *              system initialization.
     51  * Panic        Errors that definitely result in panic'ing the system.
     52  * Expected     Expected error, do not panic, plus do not send ereport.
     53  * Protected    Errors SW to determine panic or not, forgivable for safe access.
     54  *              Set when SW determines this error is forgivable during safe acc.
     55  * No-panic     Errors that don't directly result in panic'ing the system.
     56  * No-Error     When an interrupt occured and no errors were seen
     57  */
     58 #define	PX_HW_RESET		(0x1 << 5)
     59 #define	PX_PANIC		(0x1 << 4)
     60 #define	PX_EXPECTED		(0x1 << 3)
     61 #define	PX_PROTECTED		(0x1 << 2)
     62 #define	PX_NO_PANIC		(0x1 << 1)
     63 #define	PX_NO_ERROR		(0x1 << 0)
     64 
     65 #define	PX_HB		(0x1 << 2)
     66 #define	PX_RP		(0x1 << 1)
     67 #define	PX_RC		(0x1 << 0)
     68 
     69 /*
     70  * Generic PCIe Root Port Error Handling
     71  * This struct must align with px_pec_err_t in sun4v/io/px/px_err.h
     72  */
     73 typedef struct px_err_pcie {
     74 	uint32_t tx_hdr1;	/* sysino */
     75 	uint32_t tx_hdr2;	/* sysino */
     76 	uint32_t tx_hdr3;	/* ehdl */
     77 	uint32_t tx_hdr4;	/* ehdl */
     78 	uint32_t primary_ue;	/* stick */
     79 	uint32_t rsvd0;		/* stick */
     80 	uint32_t rsvd1;		/* pec_desc */
     81 	uint16_t pci_err_status;
     82 	uint16_t pcie_err_status;
     83 	uint32_t ce_reg;
     84 	uint32_t ue_reg;
     85 	uint32_t rx_hdr1;	/* hdr[0] */
     86 	uint32_t rx_hdr2;	/* hdr[0] */
     87 	uint32_t rx_hdr3;	/* hdr[1] */
     88 	uint32_t rx_hdr4;	/* hdr[1] */
     89 	uint32_t rsvd3;		/* err_src_reg */
     90 	uint32_t rsvd4;		/* root err status */
     91 } px_err_pcie_t;
     92 
     93 #define	PX_FM_BLOCK_HOST	(0x1 << 0)
     94 #define	PX_FM_BLOCK_PCIE	(0x1 << 1)
     95 #define	PX_FM_BLOCK_ALL		(PX_FM_BLOCK_HOST | PX_FM_BLOCK_PCIE)
     96 
     97 /*
     98  * Error handling FMA hook
     99  */
    100 extern void px_bus_enter(dev_info_t *dip, ddi_acc_handle_t handle);
    101 extern void px_bus_exit(dev_info_t *dip, ddi_acc_handle_t handle);
    102 extern int px_fm_attach(px_t *px_p);
    103 extern void px_fm_detach(px_t *px_p);
    104 extern int px_fm_init_child(dev_info_t *, dev_info_t *, int,
    105     ddi_iblock_cookie_t *);
    106 extern void px_fm_acc_setup(ddi_map_req_t *, dev_info_t *, pci_regspec_t *rp);
    107 extern int px_fm_callback(dev_info_t *, ddi_fm_error_t *, const void *);
    108 extern int px_err_cmn_intr(px_t *, ddi_fm_error_t *, int, int);
    109 
    110 /*
    111  * Fire interrupt handlers
    112  */
    113 extern uint_t px_err_cb_intr(caddr_t arg);
    114 extern uint_t px_err_dmc_pec_intr(caddr_t arg);
    115 extern uint_t px_err_fabric_intr(px_t *px_p, msgcode_t msg_code,
    116     pcie_req_id_t rid);
    117 
    118 /*
    119  * Common error handling functions
    120  */
    121 extern int px_scan_fabric(px_t *px_p, dev_info_t *rdip, ddi_fm_error_t *derr);
    122 extern void px_err_safeacc_check(px_t *px_p, ddi_fm_error_t *derr);
    123 extern int px_err_check_eq(dev_info_t *dip);
    124 extern int px_err_check_pcie(dev_info_t *dip, ddi_fm_error_t *derr,
    125     px_err_pcie_t *regs);
    126 extern int px_fm_enter(px_t *px_p);
    127 extern void px_fm_exit(px_t *px_p);
    128 extern void px_err_panic(int err, int msg, int fab_err, boolean_t isTest);
    129 extern void px_rp_en_q(px_t *px_p, pcie_req_id_t fault_bdf,
    130     uint32_t fault_addr, uint16_t s_status);
    131 
    132 /*
    133  * Sparc specific cfg, pio and dma handle lookup/check functions
    134  */
    135 extern int px_err_cfg_hdl_check(dev_info_t *dip, const void *handle,
    136     const void *addr, const void *not_used);
    137 extern int px_err_pio_hdl_check(dev_info_t *dip, const void *handle,
    138     const void *addr, const void *not_used);
    139 extern int px_err_dma_hdl_check(dev_info_t *dip, const void *handle,
    140     const void *addr, const void *not_used);
    141 
    142 #ifdef	__cplusplus
    143 }
    144 #endif
    145 
    146 #endif	/* _SYS_PX_FM_H */
    147