1 0 stevel /* 2 0 stevel * CDDL HEADER START 3 0 stevel * 4 0 stevel * The contents of this file are subject to the terms of the 5 2086 sudheer * Common Development and Distribution License (the "License"). 6 2086 sudheer * You may not use this file except in compliance with the License. 7 0 stevel * 8 0 stevel * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 0 stevel * or http://www.opensolaris.org/os/licensing. 10 0 stevel * See the License for the specific language governing permissions 11 0 stevel * and limitations under the License. 12 0 stevel * 13 0 stevel * When distributing Covered Code, include this CDDL HEADER in each 14 0 stevel * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 0 stevel * If applicable, add the following below this CDDL HEADER, with the 16 0 stevel * fields enclosed by brackets "[]" replaced with your own identifying 17 0 stevel * information: Portions Copyright [yyyy] [name of copyright owner] 18 0 stevel * 19 0 stevel * CDDL HEADER END 20 0 stevel */ 21 390 raf 22 0 stevel /* 23 9384 Roger * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24 0 stevel * Use is subject to license terms. 25 0 stevel */ 26 0 stevel 27 0 stevel /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */ 28 0 stevel /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */ 29 0 stevel /* All Rights Reserved */ 30 0 stevel /* */ 31 0 stevel /* Copyright (c) 1987, 1988 Microsoft Corporation */ 32 0 stevel /* All Rights Reserved */ 33 0 stevel /* */ 34 0 stevel 35 0 stevel #include <sys/types.h> 36 0 stevel #include <sys/sysmacros.h> 37 0 stevel #include <sys/param.h> 38 0 stevel #include <sys/signal.h> 39 0 stevel #include <sys/systm.h> 40 0 stevel #include <sys/user.h> 41 0 stevel #include <sys/proc.h> 42 0 stevel #include <sys/disp.h> 43 0 stevel #include <sys/class.h> 44 0 stevel #include <sys/core.h> 45 0 stevel #include <sys/syscall.h> 46 0 stevel #include <sys/cpuvar.h> 47 0 stevel #include <sys/vm.h> 48 0 stevel #include <sys/sysinfo.h> 49 0 stevel #include <sys/fault.h> 50 0 stevel #include <sys/stack.h> 51 0 stevel #include <sys/psw.h> 52 0 stevel #include <sys/regset.h> 53 0 stevel #include <sys/fp.h> 54 0 stevel #include <sys/trap.h> 55 0 stevel #include <sys/kmem.h> 56 0 stevel #include <sys/vtrace.h> 57 0 stevel #include <sys/cmn_err.h> 58 0 stevel #include <sys/prsystm.h> 59 0 stevel #include <sys/mutex_impl.h> 60 0 stevel #include <sys/machsystm.h> 61 0 stevel #include <sys/archsystm.h> 62 0 stevel #include <sys/sdt.h> 63 0 stevel #include <sys/avintr.h> 64 0 stevel #include <sys/kobj.h> 65 0 stevel 66 0 stevel #include <vm/hat.h> 67 0 stevel 68 0 stevel #include <vm/seg_kmem.h> 69 0 stevel #include <vm/as.h> 70 0 stevel #include <vm/seg.h> 71 0 stevel #include <vm/hat_pte.h> 72 3446 mrj #include <vm/hat_i86.h> 73 0 stevel 74 0 stevel #include <sys/procfs.h> 75 0 stevel 76 0 stevel #include <sys/reboot.h> 77 0 stevel #include <sys/debug.h> 78 0 stevel #include <sys/debugreg.h> 79 0 stevel #include <sys/modctl.h> 80 0 stevel #include <sys/aio_impl.h> 81 0 stevel #include <sys/tnf.h> 82 0 stevel #include <sys/tnf_probe.h> 83 0 stevel #include <sys/cred.h> 84 0 stevel #include <sys/mman.h> 85 0 stevel #include <sys/x86_archext.h> 86 0 stevel #include <sys/copyops.h> 87 0 stevel #include <c2/audit.h> 88 0 stevel #include <sys/ftrace.h> 89 0 stevel #include <sys/panic.h> 90 0 stevel #include <sys/traptrace.h> 91 0 stevel #include <sys/ontrap.h> 92 0 stevel #include <sys/cpc_impl.h> 93 3446 mrj #include <sys/bootconf.h> 94 3446 mrj #include <sys/bootinfo.h> 95 3446 mrj #include <sys/promif.h> 96 3446 mrj #include <sys/mach_mmu.h> 97 5084 johnlev #if defined(__xpv) 98 5084 johnlev #include <sys/hypervisor.h> 99 5084 johnlev #endif 100 5254 gavinm #include <sys/contract/process_impl.h> 101 0 stevel 102 0 stevel #define USER 0x10000 /* user-mode flag added to trap type */ 103 0 stevel 104 0 stevel static const char *trap_type_mnemonic[] = { 105 0 stevel "de", "db", "2", "bp", 106 0 stevel "of", "br", "ud", "nm", 107 0 stevel "df", "9", "ts", "np", 108 0 stevel "ss", "gp", "pf", "15", 109 0 stevel "mf", "ac", "mc", "xf" 110 0 stevel }; 111 0 stevel 112 0 stevel static const char *trap_type[] = { 113 0 stevel "Divide error", /* trap id 0 */ 114 0 stevel "Debug", /* trap id 1 */ 115 0 stevel "NMI interrupt", /* trap id 2 */ 116 0 stevel "Breakpoint", /* trap id 3 */ 117 0 stevel "Overflow", /* trap id 4 */ 118 0 stevel "BOUND range exceeded", /* trap id 5 */ 119 0 stevel "Invalid opcode", /* trap id 6 */ 120 0 stevel "Device not available", /* trap id 7 */ 121 0 stevel "Double fault", /* trap id 8 */ 122 0 stevel "Coprocessor segment overrun", /* trap id 9 */ 123 0 stevel "Invalid TSS", /* trap id 10 */ 124 0 stevel "Segment not present", /* trap id 11 */ 125 0 stevel "Stack segment fault", /* trap id 12 */ 126 0 stevel "General protection", /* trap id 13 */ 127 0 stevel "Page fault", /* trap id 14 */ 128 0 stevel "Reserved", /* trap id 15 */ 129 0 stevel "x87 floating point error", /* trap id 16 */ 130 0 stevel "Alignment check", /* trap id 17 */ 131 0 stevel "Machine check", /* trap id 18 */ 132 0 stevel "SIMD floating point exception", /* trap id 19 */ 133 0 stevel }; 134 0 stevel 135 0 stevel #define TRAP_TYPES (sizeof (trap_type) / sizeof (trap_type[0])) 136 0 stevel 137 3939 sethg #define SLOW_SCALL_SIZE 2 138 3939 sethg #define FAST_SCALL_SIZE 2 139 3939 sethg 140 0 stevel int tudebug = 0; 141 0 stevel int tudebugbpt = 0; 142 0 stevel int tudebugfpe = 0; 143 0 stevel int tudebugsse = 0; 144 0 stevel 145 0 stevel #if defined(TRAPDEBUG) || defined(lint) 146 0 stevel int tdebug = 0; 147 0 stevel int lodebug = 0; 148 0 stevel int faultdebug = 0; 149 0 stevel #else 150 0 stevel #define tdebug 0 151 0 stevel #define lodebug 0 152 0 stevel #define faultdebug 0 153 0 stevel #endif /* defined(TRAPDEBUG) || defined(lint) */ 154 0 stevel 155 0 stevel #if defined(TRAPTRACE) 156 6336 bholler /* 157 6336 bholler * trap trace record for cpu0 is allocated here. 158 6336 bholler * trap trace records for non-boot cpus are allocated in mp_startup_init(). 159 6336 bholler */ 160 6336 bholler static trap_trace_rec_t trap_tr0[TRAPTR_NENT]; 161 6336 bholler trap_trace_ctl_t trap_trace_ctl[NCPU] = { 162 6336 bholler { 163 6336 bholler (uintptr_t)trap_tr0, /* next record */ 164 6336 bholler (uintptr_t)trap_tr0, /* first record */ 165 6336 bholler (uintptr_t)(trap_tr0 + TRAPTR_NENT), /* limit */ 166 6336 bholler (uintptr_t)0 /* current */ 167 6336 bholler }, 168 6336 bholler }; 169 6336 bholler 170 6336 bholler /* 171 6336 bholler * default trap buffer size 172 6336 bholler */ 173 6336 bholler size_t trap_trace_bufsize = TRAPTR_NENT * sizeof (trap_trace_rec_t); 174 6336 bholler int trap_trace_freeze = 0; 175 6336 bholler int trap_trace_off = 0; 176 6336 bholler 177 6336 bholler /* 178 6336 bholler * A dummy TRAPTRACE entry to use after death. 179 6336 bholler */ 180 6336 bholler trap_trace_rec_t trap_trace_postmort; 181 6336 bholler 182 0 stevel static void dump_ttrace(void); 183 0 stevel #endif /* TRAPTRACE */ 184 0 stevel static void dumpregs(struct regs *); 185 0 stevel static void showregs(uint_t, struct regs *, caddr_t); 186 0 stevel static int kern_gpfault(struct regs *); 187 0 stevel 188 0 stevel /*ARGSUSED*/ 189 0 stevel static int 190 0 stevel die(uint_t type, struct regs *rp, caddr_t addr, processorid_t cpuid) 191 0 stevel { 192 5084 johnlev struct panic_trap_info ti; 193 0 stevel const char *trap_name, *trap_mnemonic; 194 0 stevel 195 0 stevel if (type < TRAP_TYPES) { 196 0 stevel trap_name = trap_type[type]; 197 0 stevel trap_mnemonic = trap_type_mnemonic[type]; 198 0 stevel } else { 199 0 stevel trap_name = "trap"; 200 0 stevel trap_mnemonic = "-"; 201 0 stevel } 202 0 stevel 203 0 stevel #ifdef TRAPTRACE 204 0 stevel TRAPTRACE_FREEZE; 205 0 stevel #endif 206 0 stevel 207 0 stevel ti.trap_regs = rp; 208 0 stevel ti.trap_type = type & ~USER; 209 0 stevel ti.trap_addr = addr; 210 0 stevel 211 0 stevel curthread->t_panic_trap = &ti; 212 0 stevel 213 0 stevel if (type == T_PGFLT && addr < (caddr_t)KERNELBASE) { 214 0 stevel panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p " 215 0 stevel "occurred in module \"%s\" due to %s", 216 0 stevel type, trap_mnemonic, trap_name, (void *)rp, (void *)addr, 217 0 stevel mod_containing_pc((caddr_t)rp->r_pc), 218 0 stevel addr < (caddr_t)PAGESIZE ? 219 0 stevel "a NULL pointer dereference" : 220 0 stevel "an illegal access to a user address"); 221 0 stevel } else 222 0 stevel panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p", 223 0 stevel type, trap_mnemonic, trap_name, (void *)rp, (void *)addr); 224 0 stevel return (0); 225 0 stevel } 226 0 stevel 227 0 stevel /* 228 0 stevel * Rewrite the instruction at pc to be an int $T_SYSCALLINT instruction. 229 0 stevel * 230 0 stevel * int <vector> is two bytes: 0xCD <vector> 231 0 stevel */ 232 0 stevel 233 0 stevel static int 234 0 stevel rewrite_syscall(caddr_t pc) 235 0 stevel { 236 0 stevel uchar_t instr[SLOW_SCALL_SIZE] = { 0xCD, T_SYSCALLINT }; 237 0 stevel 238 0 stevel if (uwrite(curthread->t_procp, instr, SLOW_SCALL_SIZE, 239 0 stevel (uintptr_t)pc) != 0) 240 0 stevel return (1); 241 0 stevel 242 0 stevel return (0); 243 0 stevel } 244 0 stevel 245 0 stevel /* 246 0 stevel * Test to see if the instruction at pc is sysenter or syscall. The second 247 0 stevel * argument should be the x86 feature flag corresponding to the expected 248 0 stevel * instruction. 249 0 stevel * 250 0 stevel * sysenter is two bytes: 0x0F 0x34 251 0 stevel * syscall is two bytes: 0x0F 0x05 252 3939 sethg * int $T_SYSCALLINT is two bytes: 0xCD 0x91 253 0 stevel */ 254 0 stevel 255 0 stevel static int 256 3939 sethg instr_is_other_syscall(caddr_t pc, int which) 257 0 stevel { 258 0 stevel uchar_t instr[FAST_SCALL_SIZE]; 259 0 stevel 260 3939 sethg ASSERT(which == X86_SEP || which == X86_ASYSC || which == 0xCD); 261 0 stevel 262 3939 sethg if (copyin_nowatch(pc, (caddr_t)instr, FAST_SCALL_SIZE) != 0) 263 0 stevel return (0); 264 0 stevel 265 3939 sethg switch (which) { 266 3939 sethg case X86_SEP: 267 3939 sethg if (instr[0] == 0x0F && instr[1] == 0x34) 268 3939 sethg return (1); 269 3939 sethg break; 270 3939 sethg case X86_ASYSC: 271 3939 sethg if (instr[0] == 0x0F && instr[1] == 0x05) 272 3939 sethg return (1); 273 3939 sethg break; 274 3939 sethg case 0xCD: 275 3939 sethg if (instr[0] == 0xCD && instr[1] == T_SYSCALLINT) 276 3939 sethg return (1); 277 3939 sethg break; 278 3939 sethg } 279 0 stevel 280 0 stevel return (0); 281 3939 sethg } 282 3939 sethg 283 3939 sethg static const char * 284 3939 sethg syscall_insn_string(int syscall_insn) 285 3939 sethg { 286 3939 sethg switch (syscall_insn) { 287 3939 sethg case X86_SEP: 288 3939 sethg return ("sysenter"); 289 3939 sethg case X86_ASYSC: 290 3939 sethg return ("syscall"); 291 3939 sethg case 0xCD: 292 3939 sethg return ("int"); 293 3939 sethg default: 294 3939 sethg return ("Unknown"); 295 3939 sethg } 296 3939 sethg } 297 3939 sethg 298 3939 sethg static int 299 3939 sethg ldt_rewrite_syscall(struct regs *rp, proc_t *p, int syscall_insn) 300 3939 sethg { 301 3939 sethg caddr_t linearpc; 302 3939 sethg int return_code = 0; 303 3939 sethg 304 3939 sethg mutex_enter(&p->p_ldtlock); /* Must be held across linear_pc() */ 305 3939 sethg 306 3939 sethg if (linear_pc(rp, p, &linearpc) == 0) { 307 3939 sethg 308 3939 sethg /* 309 3939 sethg * If another thread beat us here, it already changed 310 3939 sethg * this site to the slower (int) syscall instruction. 311 3939 sethg */ 312 3939 sethg if (instr_is_other_syscall(linearpc, 0xCD)) { 313 3939 sethg return_code = 1; 314 3939 sethg } else if (instr_is_other_syscall(linearpc, syscall_insn)) { 315 3939 sethg 316 3939 sethg if (rewrite_syscall(linearpc) == 0) { 317 3939 sethg return_code = 1; 318 3939 sethg } 319 3939 sethg #ifdef DEBUG 320 3939 sethg else 321 3939 sethg cmn_err(CE_WARN, "failed to rewrite %s " 322 3939 sethg "instruction in process %d", 323 3939 sethg syscall_insn_string(syscall_insn), 324 3939 sethg p->p_pid); 325 3939 sethg #endif /* DEBUG */ 326 3939 sethg } 327 3939 sethg } 328 3939 sethg 329 3939 sethg mutex_exit(&p->p_ldtlock); /* Must be held across linear_pc() */ 330 3939 sethg 331 3939 sethg return (return_code); 332 0 stevel } 333 0 stevel 334 0 stevel /* 335 0 stevel * Test to see if the instruction at pc is a system call instruction. 336 0 stevel * 337 0 stevel * The bytes of an lcall instruction used for the syscall trap. 338 0 stevel * static uchar_t lcall[7] = { 0x9a, 0, 0, 0, 0, 0x7, 0 }; 339 0 stevel * static uchar_t lcallalt[7] = { 0x9a, 0, 0, 0, 0, 0x27, 0 }; 340 0 stevel */ 341 0 stevel 342 0 stevel #define LCALLSIZE 7 343 0 stevel 344 0 stevel static int 345 3939 sethg instr_is_lcall_syscall(caddr_t pc) 346 0 stevel { 347 0 stevel uchar_t instr[LCALLSIZE]; 348 0 stevel 349 0 stevel if (copyin_nowatch(pc, (caddr_t)instr, LCALLSIZE) == 0 && 350 0 stevel instr[0] == 0x9a && 351 0 stevel instr[1] == 0 && 352 0 stevel instr[2] == 0 && 353 0 stevel instr[3] == 0 && 354 0 stevel instr[4] == 0 && 355 0 stevel (instr[5] == 0x7 || instr[5] == 0x27) && 356 0 stevel instr[6] == 0) 357 0 stevel return (1); 358 0 stevel 359 0 stevel return (0); 360 0 stevel } 361 0 stevel 362 1363 fvdl #ifdef __amd64 363 1363 fvdl 364 1363 fvdl /* 365 3446 mrj * In the first revisions of amd64 CPUs produced by AMD, the LAHF and 366 3446 mrj * SAHF instructions were not implemented in 64-bit mode. Later revisions 367 1363 fvdl * did implement these instructions. An extension to the cpuid instruction 368 1363 fvdl * was added to check for the capability of executing these instructions 369 3446 mrj * in 64-bit mode. 370 1363 fvdl * 371 1363 fvdl * Intel originally did not implement these instructions in EM64T either, 372 1363 fvdl * but added them in later revisions. 373 1363 fvdl * 374 1363 fvdl * So, there are different chip revisions by both vendors out there that 375 1363 fvdl * may or may not implement these instructions. The easy solution is to 376 1363 fvdl * just always emulate these instructions on demand. 377 1363 fvdl * 378 1363 fvdl * SAHF == store %ah in the lower 8 bits of %rflags (opcode 0x9e) 379 1363 fvdl * LAHF == load the lower 8 bits of %rflags into %ah (opcode 0x9f) 380 1363 fvdl */ 381 1363 fvdl 382 1363 fvdl #define LSAHFSIZE 1 383 1363 fvdl 384 1363 fvdl static int 385 1363 fvdl instr_is_lsahf(caddr_t pc, uchar_t *instr) 386 1363 fvdl { 387 1363 fvdl if (copyin_nowatch(pc, (caddr_t)instr, LSAHFSIZE) == 0 && 388 1363 fvdl (*instr == 0x9e || *instr == 0x9f)) 389 1363 fvdl return (1); 390 1363 fvdl return (0); 391 1363 fvdl } 392 1363 fvdl 393 1363 fvdl /* 394 1363 fvdl * Emulate the LAHF and SAHF instructions. The reference manuals define 395 1363 fvdl * these instructions to always load/store bit 1 as a 1, and bits 3 and 5 396 1363 fvdl * as a 0. The other, defined, bits are copied (the PS_ICC bits and PS_P). 397 1363 fvdl * 398 1363 fvdl * Note that %ah is bits 8-15 of %rax. 399 1363 fvdl */ 400 1363 fvdl static void 401 1363 fvdl emulate_lsahf(struct regs *rp, uchar_t instr) 402 1363 fvdl { 403 1363 fvdl if (instr == 0x9e) { 404 1363 fvdl /* sahf. Copy bits from %ah to flags. */ 405 1363 fvdl rp->r_ps = (rp->r_ps & ~0xff) | 406 1363 fvdl ((rp->r_rax >> 8) & PSL_LSAHFMASK) | PS_MB1; 407 1363 fvdl } else { 408 1363 fvdl /* lahf. Copy bits from flags to %ah. */ 409 1363 fvdl rp->r_rax = (rp->r_rax & ~0xff00) | 410 1363 fvdl (((rp->r_ps & PSL_LSAHFMASK) | PS_MB1) << 8); 411 1363 fvdl } 412 1363 fvdl rp->r_pc += LSAHFSIZE; 413 1363 fvdl } 414 1363 fvdl #endif /* __amd64 */ 415 1363 fvdl 416 0 stevel #ifdef OPTERON_ERRATUM_91 417 0 stevel 418 0 stevel /* 419 0 stevel * Test to see if the instruction at pc is a prefetch instruction. 420 0 stevel * 421 0 stevel * The first byte of prefetch instructions is always 0x0F. 422 0 stevel * The second byte is 0x18 for regular prefetch or 0x0D for AMD 3dnow prefetch. 423 10136 George * The third byte (ModRM) contains the register field bits (bits 3-5). 424 10136 George * These bits must be between 0 and 3 inclusive for regular prefetch and 425 10136 George * 0 and 1 inclusive for AMD 3dnow prefetch. 426 8241 Jeff * 427 8241 Jeff * In 64-bit mode, there may be a one-byte REX prefex (0x40-0x4F). 428 0 stevel */ 429 0 stevel 430 0 stevel static int 431 0 stevel cmp_to_prefetch(uchar_t *p) 432 0 stevel { 433 8241 Jeff #ifdef _LP64 434 8241 Jeff if ((p[0] & 0xF0) == 0x40) /* 64-bit REX prefix */ 435 8241 Jeff p++; 436 8241 Jeff #endif 437 10136 George return ((p[0] == 0x0F && p[1] == 0x18 && ((p[2] >> 3) & 7) <= 3) || 438 10136 George (p[0] == 0x0F && p[1] == 0x0D && ((p[2] >> 3) & 7) <= 1)); 439 0 stevel } 440 0 stevel 441 0 stevel static int 442 0 stevel instr_is_prefetch(caddr_t pc) 443 0 stevel { 444 8241 Jeff uchar_t instr[4]; /* optional REX prefix plus 3-byte opcode */ 445 0 stevel 446 8241 Jeff return (copyin_nowatch(pc, instr, sizeof (instr)) == 0 && 447 8241 Jeff cmp_to_prefetch(instr)); 448 0 stevel } 449 0 stevel 450 0 stevel #endif /* OPTERON_ERRATUM_91 */ 451 0 stevel 452 0 stevel /* 453 0 stevel * Called from the trap handler when a processor trap occurs. 454 0 stevel * 455 0 stevel * Note: All user-level traps that might call stop() must exit 456 0 stevel * trap() by 'goto out' or by falling through. 457 3446 mrj * Note Also: trap() is usually called with interrupts enabled, (PS_IE == 1) 458 3446 mrj * however, there are paths that arrive here with PS_IE == 0 so special care 459 3446 mrj * must be taken in those cases. 460 0 stevel */ 461 0 stevel void 462 0 stevel trap(struct regs *rp, caddr_t addr, processorid_t cpuid) 463 0 stevel { 464 3446 mrj kthread_t *ct = curthread; 465 0 stevel enum seg_rw rw; 466 0 stevel unsigned type; 467 3446 mrj proc_t *p = ttoproc(ct); 468 3446 mrj klwp_t *lwp = ttolwp(ct); 469 0 stevel uintptr_t lofault; 470 0 stevel faultcode_t pagefault(), res, errcode; 471 0 stevel enum fault_type fault_type; 472 0 stevel k_siginfo_t siginfo; 473 0 stevel uint_t fault = 0; 474 0 stevel int mstate; 475 0 stevel int sicode = 0; 476 0 stevel int watchcode; 477 0 stevel int watchpage; 478 0 stevel caddr_t vaddr; 479 2712 nn35248 int singlestep_twiddle; 480 0 stevel size_t sz; 481 0 stevel int ta; 482 1363 fvdl #ifdef __amd64 483 1363 fvdl uchar_t instr; 484 1363 fvdl #endif 485 0 stevel 486 0 stevel ASSERT_STACK_ALIGNED(); 487 0 stevel 488 0 stevel type = rp->r_trapno; 489 0 stevel CPU_STATS_ADDQ(CPU, sys, trap, 1); 490 3446 mrj ASSERT(ct->t_schedflag & TS_DONT_SWAP); 491 0 stevel 492 0 stevel if (type == T_PGFLT) { 493 0 stevel 494 0 stevel errcode = rp->r_err; 495 0 stevel if (errcode & PF_ERR_WRITE) 496 0 stevel rw = S_WRITE; 497 0 stevel else if ((caddr_t)rp->r_pc == addr || 498 0 stevel (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) 499 0 stevel rw = S_EXEC; 500 0 stevel else 501 0 stevel rw = S_READ; 502 0 stevel 503 0 stevel #if defined(__i386) 504 0 stevel /* 505 0 stevel * Pentium Pro work-around 506 0 stevel */ 507 0 stevel if ((errcode & PF_ERR_PROT) && pentiumpro_bug4046376) { 508 0 stevel uint_t attr; 509 0 stevel uint_t priv_violation; 510 0 stevel uint_t access_violation; 511 0 stevel 512 0 stevel if (hat_getattr(addr < (caddr_t)kernelbase ? 513 0 stevel curproc->p_as->a_hat : kas.a_hat, addr, &attr) 514 0 stevel == -1) { 515 0 stevel errcode &= ~PF_ERR_PROT; 516 0 stevel } else { 517 0 stevel priv_violation = (errcode & PF_ERR_USER) && 518 5084 johnlev !(attr & PROT_USER); 519 0 stevel access_violation = (errcode & PF_ERR_WRITE) && 520 5084 johnlev !(attr & PROT_WRITE); 521 0 stevel if (!priv_violation && !access_violation) 522 0 stevel goto cleanup; 523 0 stevel } 524 0 stevel } 525 0 stevel #endif /* __i386 */ 526 0 stevel 527 3446 mrj } else if (type == T_SGLSTP && lwp != NULL) 528 3446 mrj lwp->lwp_pcb.pcb_drstat = (uintptr_t)addr; 529 0 stevel 530 0 stevel if (tdebug) 531 0 stevel showregs(type, rp, addr); 532 0 stevel 533 0 stevel if (USERMODE(rp->r_cs)) { 534 0 stevel /* 535 0 stevel * Set up the current cred to use during this trap. u_cred 536 0 stevel * no longer exists. t_cred is used instead. 537 0 stevel * The current process credential applies to the thread for 538 0 stevel * the entire trap. If trapping from the kernel, this 539 0 stevel * should already be set up. 540 0 stevel */ 541 3446 mrj if (ct->t_cred != p->p_cred) { 542 3446 mrj cred_t *oldcred = ct->t_cred; 543 0 stevel /* 544 0 stevel * DTrace accesses t_cred in probe context. t_cred 545 0 stevel * must always be either NULL, or point to a valid, 546 0 stevel * allocated cred structure. 547 0 stevel */ 548 3446 mrj ct->t_cred = crgetcred(); 549 0 stevel crfree(oldcred); 550 0 stevel } 551 0 stevel ASSERT(lwp != NULL); 552 0 stevel type |= USER; 553 0 stevel ASSERT(lwptoregs(lwp) == rp); 554 0 stevel lwp->lwp_state = LWP_SYS; 555 0 stevel 556 0 stevel switch (type) { 557 0 stevel case T_PGFLT + USER: 558 0 stevel if ((caddr_t)rp->r_pc == addr) 559 0 stevel mstate = LMS_TFAULT; 560 0 stevel else 561 0 stevel mstate = LMS_DFAULT; 562 0 stevel break; 563 0 stevel default: 564 0 stevel mstate = LMS_TRAP; 565 0 stevel break; 566 0 stevel } 567 0 stevel /* Kernel probe */ 568 0 stevel TNF_PROBE_1(thread_state, "thread", /* CSTYLED */, 569 0 stevel tnf_microstate, state, mstate); 570 3446 mrj mstate = new_mstate(ct, mstate); 571 0 stevel 572 0 stevel bzero(&siginfo, sizeof (siginfo)); 573 0 stevel } 574 0 stevel 575 0 stevel switch (type) { 576 0 stevel case T_PGFLT + USER: 577 0 stevel case T_SGLSTP: 578 0 stevel case T_SGLSTP + USER: 579 0 stevel case T_BPTFLT + USER: 580 0 stevel break; 581 0 stevel 582 0 stevel default: 583 0 stevel FTRACE_2("trap(): type=0x%lx, regs=0x%lx", 584 0 stevel (ulong_t)type, (ulong_t)rp); 585 0 stevel break; 586 0 stevel } 587 0 stevel 588 0 stevel switch (type) { 589 5849 sethg case T_SIMDFPE: 590 5849 sethg /* Make sure we enable interrupts before die()ing */ 591 5849 sethg sti(); /* The SIMD exception comes in via cmninttrap */ 592 5849 sethg /*FALLTHROUGH*/ 593 0 stevel default: 594 0 stevel if (type & USER) { 595 0 stevel if (tudebug) 596 0 stevel showregs(type, rp, (caddr_t)0); 597 0 stevel printf("trap: Unknown trap type %d in user mode\n", 598 0 stevel type & ~USER); 599 0 stevel siginfo.si_signo = SIGILL; 600 0 stevel siginfo.si_code = ILL_ILLTRP; 601 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 602 0 stevel siginfo.si_trapno = type & ~USER; 603 0 stevel fault = FLTILL; 604 0 stevel break; 605 0 stevel } else { 606 0 stevel (void) die(type, rp, addr, cpuid); 607 0 stevel /*NOTREACHED*/ 608 0 stevel } 609 0 stevel 610 0 stevel case T_PGFLT: /* system page fault */ 611 0 stevel /* 612 0 stevel * If we're under on_trap() protection (see <sys/ontrap.h>), 613 5254 gavinm * set ot_trap and bounce back to the on_trap() call site 614 5254 gavinm * via the installed trampoline. 615 0 stevel */ 616 3446 mrj if ((ct->t_ontrap != NULL) && 617 3446 mrj (ct->t_ontrap->ot_prot & OT_DATA_ACCESS)) { 618 3446 mrj ct->t_ontrap->ot_trap |= OT_DATA_ACCESS; 619 5254 gavinm rp->r_pc = ct->t_ontrap->ot_trampoline; 620 5254 gavinm goto cleanup; 621 0 stevel } 622 0 stevel 623 0 stevel /* 624 0 stevel * See if we can handle as pagefault. Save lofault 625 0 stevel * across this. Here we assume that an address 626 0 stevel * less than KERNELBASE is a user fault. 627 0 stevel * We can do this as copy.s routines verify that the 628 0 stevel * starting address is less than KERNELBASE before 629 0 stevel * starting and because we know that we always have 630 0 stevel * KERNELBASE mapped as invalid to serve as a "barrier". 631 0 stevel */ 632 3446 mrj lofault = ct->t_lofault; 633 3446 mrj ct->t_lofault = 0; 634 0 stevel 635 3446 mrj mstate = new_mstate(ct, LMS_KFAULT); 636 0 stevel 637 0 stevel if (addr < (caddr_t)kernelbase) { 638 0 stevel res = pagefault(addr, 639 0 stevel (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 0); 640 0 stevel if (res == FC_NOMAP && 641 0 stevel addr < p->p_usrstack && 642 0 stevel grow(addr)) 643 0 stevel res = 0; 644 0 stevel } else { 645 0 stevel res = pagefault(addr, 646 0 stevel (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 1); 647 0 stevel } 648 3446 mrj (void) new_mstate(ct, mstate); 649 0 stevel 650 0 stevel /* 651 0 stevel * Restore lofault. If we resolved the fault, exit. 652 0 stevel * If we didn't and lofault wasn't set, die. 653 0 stevel */ 654 3446 mrj ct->t_lofault = lofault; 655 0 stevel if (res == 0) 656 0 stevel goto cleanup; 657 0 stevel 658 0 stevel #if defined(OPTERON_ERRATUM_93) && defined(_LP64) 659 0 stevel if (lofault == 0 && opteron_erratum_93) { 660 0 stevel /* 661 0 stevel * Workaround for Opteron Erratum 93. On return from 662 0 stevel * a System Managment Interrupt at a HLT instruction 663 0 stevel * the %rip might be truncated to a 32 bit value. 664 0 stevel * BIOS is supposed to fix this, but some don't. 665 0 stevel * If this occurs we simply restore the high order bits. 666 0 stevel * The HLT instruction is 1 byte of 0xf4. 667 0 stevel */ 668 0 stevel uintptr_t rip = rp->r_pc; 669 0 stevel 670 0 stevel if ((rip & 0xfffffffful) == rip) { 671 0 stevel rip |= 0xfffffffful << 32; 672 0 stevel if (hat_getpfnum(kas.a_hat, (caddr_t)rip) != 673 0 stevel PFN_INVALID && 674 0 stevel (*(uchar_t *)rip == 0xf4 || 675 0 stevel *(uchar_t *)(rip - 1) == 0xf4)) { 676 0 stevel rp->r_pc = rip; 677 0 stevel goto cleanup; 678 0 stevel } 679 0 stevel } 680 0 stevel } 681 0 stevel #endif /* OPTERON_ERRATUM_93 && _LP64 */ 682 0 stevel 683 0 stevel #ifdef OPTERON_ERRATUM_91 684 0 stevel if (lofault == 0 && opteron_erratum_91) { 685 0 stevel /* 686 0 stevel * Workaround for Opteron Erratum 91. Prefetches may 687 0 stevel * generate a page fault (they're not supposed to do 688 0 stevel * that!). If this occurs we simply return back to the 689 0 stevel * instruction. 690 0 stevel */ 691 0 stevel caddr_t pc = (caddr_t)rp->r_pc; 692 0 stevel 693 0 stevel /* 694 0 stevel * If the faulting PC is not mapped, this is a 695 0 stevel * legitimate kernel page fault that must result in a 696 0 stevel * panic. If the faulting PC is mapped, it could contain 697 0 stevel * a prefetch instruction. Check for that here. 698 0 stevel */ 699 0 stevel if (hat_getpfnum(kas.a_hat, pc) != PFN_INVALID) { 700 0 stevel if (cmp_to_prefetch((uchar_t *)pc)) { 701 0 stevel #ifdef DEBUG 702 0 stevel cmn_err(CE_WARN, "Opteron erratum 91 " 703 0 stevel "occurred: kernel prefetch" 704 0 stevel " at %p generated a page fault!", 705 0 stevel (void *)rp->r_pc); 706 0 stevel #endif /* DEBUG */ 707 0 stevel goto cleanup; 708 0 stevel } 709 0 stevel } 710 0 stevel (void) die(type, rp, addr, cpuid); 711 0 stevel } 712 0 stevel #endif /* OPTERON_ERRATUM_91 */ 713 0 stevel 714 0 stevel if (lofault == 0) 715 0 stevel (void) die(type, rp, addr, cpuid); 716 0 stevel 717 0 stevel /* 718 0 stevel * Cannot resolve fault. Return to lofault. 719 0 stevel */ 720 0 stevel if (lodebug) { 721 0 stevel showregs(type, rp, addr); 722 0 stevel traceregs(rp); 723 0 stevel } 724 0 stevel if (FC_CODE(res) == FC_OBJERR) 725 0 stevel res = FC_ERRNO(res); 726 0 stevel else 727 0 stevel res = EFAULT; 728 0 stevel rp->r_r0 = res; 729 3446 mrj rp->r_pc = ct->t_lofault; 730 0 stevel goto cleanup; 731 0 stevel 732 0 stevel case T_PGFLT + USER: /* user page fault */ 733 0 stevel if (faultdebug) { 734 0 stevel char *fault_str; 735 0 stevel 736 0 stevel switch (rw) { 737 0 stevel case S_READ: 738 0 stevel fault_str = "read"; 739 0 stevel break; 740 0 stevel case S_WRITE: 741 0 stevel fault_str = "write"; 742 0 stevel break; 743 0 stevel case S_EXEC: 744 0 stevel fault_str = "exec"; 745 0 stevel break; 746 0 stevel default: 747 0 stevel fault_str = ""; 748 0 stevel break; 749 0 stevel } 750 0 stevel printf("user %s fault: addr=0x%lx errcode=0x%x\n", 751 0 stevel fault_str, (uintptr_t)addr, errcode); 752 0 stevel } 753 0 stevel 754 0 stevel #if defined(OPTERON_ERRATUM_100) && defined(_LP64) 755 0 stevel /* 756 0 stevel * Workaround for AMD erratum 100 757 0 stevel * 758 0 stevel * A 32-bit process may receive a page fault on a non 759 0 stevel * 32-bit address by mistake. The range of the faulting 760 0 stevel * address will be 761 0 stevel * 762 0 stevel * 0xffffffff80000000 .. 0xffffffffffffffff or 763 0 stevel * 0x0000000100000000 .. 0x000000017fffffff 764 0 stevel * 765 0 stevel * The fault is always due to an instruction fetch, however 766 0 stevel * the value of r_pc should be correct (in 32 bit range), 767 0 stevel * so we ignore the page fault on the bogus address. 768 0 stevel */ 769 0 stevel if (p->p_model == DATAMODEL_ILP32 && 770 0 stevel (0xffffffff80000000 <= (uintptr_t)addr || 771 0 stevel (0x100000000 <= (uintptr_t)addr && 772 0 stevel (uintptr_t)addr <= 0x17fffffff))) { 773 0 stevel if (!opteron_erratum_100) 774 0 stevel panic("unexpected erratum #100"); 775 0 stevel if (rp->r_pc <= 0xffffffff) 776 0 stevel goto out; 777 0 stevel } 778 0 stevel #endif /* OPTERON_ERRATUM_100 && _LP64 */ 779 0 stevel 780 0 stevel ASSERT(!(curthread->t_flag & T_WATCHPT)); 781 0 stevel watchpage = (pr_watch_active(p) && pr_is_watchpage(addr, rw)); 782 0 stevel #ifdef __i386 783 0 stevel /* 784 0 stevel * In 32-bit mode, the lcall (system call) instruction fetches 785 0 stevel * one word from the stack, at the stack pointer, because of the 786 0 stevel * way the call gate is constructed. This is a bogus 787 0 stevel * read and should not be counted as a read watchpoint. 788 0 stevel * We work around the problem here by testing to see if 789 0 stevel * this situation applies and, if so, simply jumping to 790 0 stevel * the code in locore.s that fields the system call trap. 791 0 stevel * The registers on the stack are already set up properly 792 0 stevel * due to the match between the call gate sequence and the 793 0 stevel * trap gate sequence. We just have to adjust the pc. 794 0 stevel */ 795 0 stevel if (watchpage && addr == (caddr_t)rp->r_sp && 796 3939 sethg rw == S_READ && instr_is_lcall_syscall((caddr_t)rp->r_pc)) { 797 0 stevel extern void watch_syscall(void); 798 0 stevel 799 0 stevel rp->r_pc += LCALLSIZE; 800 0 stevel watch_syscall(); /* never returns */ 801 0 stevel /* NOTREACHED */ 802 0 stevel } 803 0 stevel #endif /* __i386 */ 804 0 stevel vaddr = addr; 805 0 stevel if (!watchpage || (sz = instr_size(rp, &vaddr, rw)) <= 0) 806 0 stevel fault_type = (errcode & PF_ERR_PROT)? F_PROT: F_INVAL; 807 0 stevel else if ((watchcode = pr_is_watchpoint(&vaddr, &ta, 808 0 stevel sz, NULL, rw)) != 0) { 809 0 stevel if (ta) { 810 0 stevel do_watch_step(vaddr, sz, rw, 811 5084 johnlev watchcode, rp->r_pc); 812 0 stevel fault_type = F_INVAL; 813 0 stevel } else { 814 0 stevel bzero(&siginfo, sizeof (siginfo)); 815 0 stevel siginfo.si_signo = SIGTRAP; 816 0 stevel siginfo.si_code = watchcode; 817 0 stevel siginfo.si_addr = vaddr; 818 0 stevel siginfo.si_trapafter = 0; 819 0 stevel siginfo.si_pc = (caddr_t)rp->r_pc; 820 0 stevel fault = FLTWATCH; 821 0 stevel break; 822 0 stevel } 823 0 stevel } else { 824 0 stevel /* XXX pr_watch_emul() never succeeds (for now) */ 825 0 stevel if (rw != S_EXEC && pr_watch_emul(rp, vaddr, rw)) 826 0 stevel goto out; 827 0 stevel do_watch_step(vaddr, sz, rw, 0, 0); 828 0 stevel fault_type = F_INVAL; 829 0 stevel } 830 0 stevel 831 0 stevel res = pagefault(addr, fault_type, rw, 0); 832 0 stevel 833 0 stevel /* 834 0 stevel * If pagefault() succeeded, ok. 835 0 stevel * Otherwise attempt to grow the stack. 836 0 stevel */ 837 0 stevel if (res == 0 || 838 0 stevel (res == FC_NOMAP && 839 0 stevel addr < p->p_usrstack && 840 0 stevel grow(addr))) { 841 0 stevel lwp->lwp_lastfault = FLTPAGE; 842 0 stevel lwp->lwp_lastfaddr = addr; 843 0 stevel if (prismember(&p->p_fltmask, FLTPAGE)) { 844 0 stevel bzero(&siginfo, sizeof (siginfo)); 845 0 stevel siginfo.si_addr = addr; 846 0 stevel (void) stop_on_fault(FLTPAGE, &siginfo); 847 0 stevel } 848 0 stevel goto out; 849 0 stevel } else if (res == FC_PROT && addr < p->p_usrstack && 850 0 stevel (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) { 851 0 stevel report_stack_exec(p, addr); 852 0 stevel } 853 0 stevel 854 0 stevel #ifdef OPTERON_ERRATUM_91 855 0 stevel /* 856 0 stevel * Workaround for Opteron Erratum 91. Prefetches may generate a 857 0 stevel * page fault (they're not supposed to do that!). If this 858 0 stevel * occurs we simply return back to the instruction. 859 0 stevel * 860 0 stevel * We rely on copyin to properly fault in the page with r_pc. 861 0 stevel */ 862 0 stevel if (opteron_erratum_91 && 863 0 stevel addr != (caddr_t)rp->r_pc && 864 0 stevel instr_is_prefetch((caddr_t)rp->r_pc)) { 865 0 stevel #ifdef DEBUG 866 0 stevel cmn_err(CE_WARN, "Opteron erratum 91 occurred: " 867 0 stevel "prefetch at %p in pid %d generated a trap!", 868 0 stevel (void *)rp->r_pc, p->p_pid); 869 0 stevel #endif /* DEBUG */ 870 0 stevel goto out; 871 0 stevel } 872 0 stevel #endif /* OPTERON_ERRATUM_91 */ 873 0 stevel 874 0 stevel if (tudebug) 875 0 stevel showregs(type, rp, addr); 876 0 stevel /* 877 0 stevel * In the case where both pagefault and grow fail, 878 0 stevel * set the code to the value provided by pagefault. 879 0 stevel * We map all errors returned from pagefault() to SIGSEGV. 880 0 stevel */ 881 0 stevel bzero(&siginfo, sizeof (siginfo)); 882 0 stevel siginfo.si_addr = addr; 883 0 stevel switch (FC_CODE(res)) { 884 0 stevel case FC_HWERR: 885 0 stevel case FC_NOSUPPORT: 886 0 stevel siginfo.si_signo = SIGBUS; 887 0 stevel siginfo.si_code = BUS_ADRERR; 888 0 stevel fault = FLTACCESS; 889 0 stevel break; 890 0 stevel case FC_ALIGN: 891 0 stevel siginfo.si_signo = SIGBUS; 892 0 stevel siginfo.si_code = BUS_ADRALN; 893 0 stevel fault = FLTACCESS; 894 0 stevel break; 895 0 stevel case FC_OBJERR: 896 0 stevel if ((siginfo.si_errno = FC_ERRNO(res)) != EINTR) { 897 0 stevel siginfo.si_signo = SIGBUS; 898 0 stevel siginfo.si_code = BUS_OBJERR; 899 0 stevel fault = FLTACCESS; 900 0 stevel } 901 0 stevel break; 902 0 stevel default: /* FC_NOMAP or FC_PROT */ 903 0 stevel siginfo.si_signo = SIGSEGV; 904 0 stevel siginfo.si_code = 905 0 stevel (res == FC_NOMAP)? SEGV_MAPERR : SEGV_ACCERR; 906 0 stevel fault = FLTBOUNDS; 907 0 stevel break; 908 0 stevel } 909 0 stevel break; 910 0 stevel 911 0 stevel case T_ILLINST + USER: /* invalid opcode fault */ 912 0 stevel /* 913 0 stevel * If the syscall instruction is disabled due to LDT usage, a 914 0 stevel * user program that attempts to execute it will trigger a #ud 915 0 stevel * trap. Check for that case here. If this occurs on a CPU which 916 0 stevel * doesn't even support syscall, the result of all of this will 917 0 stevel * be to emulate that particular instruction. 918 0 stevel */ 919 0 stevel if (p->p_ldt != NULL && 920 3939 sethg ldt_rewrite_syscall(rp, p, X86_ASYSC)) 921 3939 sethg goto out; 922 1363 fvdl 923 1363 fvdl #ifdef __amd64 924 1363 fvdl /* 925 1363 fvdl * Emulate the LAHF and SAHF instructions if needed. 926 1363 fvdl * See the instr_is_lsahf function for details. 927 1363 fvdl */ 928 1363 fvdl if (p->p_model == DATAMODEL_LP64 && 929 1363 fvdl instr_is_lsahf((caddr_t)rp->r_pc, &instr)) { 930 1363 fvdl emulate_lsahf(rp, instr); 931 1363 fvdl goto out; 932 1363 fvdl } 933 1363 fvdl #endif 934 1363 fvdl 935 0 stevel /*FALLTHROUGH*/ 936 0 stevel 937 0 stevel if (tudebug) 938 0 stevel showregs(type, rp, (caddr_t)0); 939 0 stevel siginfo.si_signo = SIGILL; 940 0 stevel siginfo.si_code = ILL_ILLOPC; 941 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 942 0 stevel fault = FLTILL; 943 0 stevel break; 944 0 stevel 945 0 stevel case T_ZERODIV + USER: /* integer divide by zero */ 946 0 stevel if (tudebug && tudebugfpe) 947 0 stevel showregs(type, rp, (caddr_t)0); 948 0 stevel siginfo.si_signo = SIGFPE; 949 0 stevel siginfo.si_code = FPE_INTDIV; 950 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 951 0 stevel fault = FLTIZDIV; 952 0 stevel break; 953 0 stevel 954 0 stevel case T_OVFLW + USER: /* integer overflow */ 955 0 stevel if (tudebug && tudebugfpe) 956 0 stevel showregs(type, rp, (caddr_t)0); 957 0 stevel siginfo.si_signo = SIGFPE; 958 0 stevel siginfo.si_code = FPE_INTOVF; 959 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 960 0 stevel fault = FLTIOVF; 961 0 stevel break; 962 0 stevel 963 0 stevel case T_NOEXTFLT + USER: /* math coprocessor not available */ 964 0 stevel if (tudebug && tudebugfpe) 965 0 stevel showregs(type, rp, addr); 966 0 stevel if (fpnoextflt(rp)) { 967 9384 Roger siginfo.si_signo = SIGILL; 968 0 stevel siginfo.si_code = ILL_ILLOPC; 969 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 970 9384 Roger fault = FLTILL; 971 0 stevel } 972 0 stevel break; 973 0 stevel 974 0 stevel case T_EXTOVRFLT: /* extension overrun fault */ 975 0 stevel /* check if we took a kernel trap on behalf of user */ 976 0 stevel { 977 0 stevel extern void ndptrap_frstor(void); 978 5849 sethg if (rp->r_pc != (uintptr_t)ndptrap_frstor) { 979 5849 sethg sti(); /* T_EXTOVRFLT comes in via cmninttrap */ 980 0 stevel (void) die(type, rp, addr, cpuid); 981 5849 sethg } 982 0 stevel type |= USER; 983 0 stevel } 984 0 stevel /*FALLTHROUGH*/ 985 0 stevel case T_EXTOVRFLT + USER: /* extension overrun fault */ 986 0 stevel if (tudebug && tudebugfpe) 987 0 stevel showregs(type, rp, addr); 988 0 stevel if (fpextovrflt(rp)) { 989 0 stevel siginfo.si_signo = SIGSEGV; 990 0 stevel siginfo.si_code = SEGV_MAPERR; 991 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 992 0 stevel fault = FLTBOUNDS; 993 0 stevel } 994 0 stevel break; 995 0 stevel 996 0 stevel case T_EXTERRFLT: /* x87 floating point exception pending */ 997 0 stevel /* check if we took a kernel trap on behalf of user */ 998 0 stevel { 999 0 stevel extern void ndptrap_frstor(void); 1000 5849 sethg if (rp->r_pc != (uintptr_t)ndptrap_frstor) { 1001 5849 sethg sti(); /* T_EXTERRFLT comes in via cmninttrap */ 1002 0 stevel (void) die(type, rp, addr, cpuid); 1003 5849 sethg } 1004 0 stevel type |= USER; 1005 0 stevel } 1006 0 stevel /*FALLTHROUGH*/ 1007 0 stevel 1008 0 stevel case T_EXTERRFLT + USER: /* x87 floating point exception pending */ 1009 0 stevel if (tudebug && tudebugfpe) 1010 0 stevel showregs(type, rp, addr); 1011 0 stevel if (sicode = fpexterrflt(rp)) { 1012 0 stevel siginfo.si_signo = SIGFPE; 1013 0 stevel siginfo.si_code = sicode; 1014 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 1015 0 stevel fault = FLTFPE; 1016 0 stevel } 1017 0 stevel break; 1018 0 stevel 1019 0 stevel case T_SIMDFPE + USER: /* SSE and SSE2 exceptions */ 1020 0 stevel if (tudebug && tudebugsse) 1021 0 stevel showregs(type, rp, addr); 1022 0 stevel if ((x86_feature & (X86_SSE|X86_SSE2)) == 0) { 1023 0 stevel /* 1024 0 stevel * There are rumours that some user instructions 1025 0 stevel * on older CPUs can cause this trap to occur; in 1026 0 stevel * which case send a SIGILL instead of a SIGFPE. 1027 0 stevel */ 1028 0 stevel siginfo.si_signo = SIGILL; 1029 0 stevel siginfo.si_code = ILL_ILLTRP; 1030 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 1031 0 stevel siginfo.si_trapno = type & ~USER; 1032 0 stevel fault = FLTILL; 1033 0 stevel } else if ((sicode = fpsimderrflt(rp)) != 0) { 1034 0 stevel siginfo.si_signo = SIGFPE; 1035 0 stevel siginfo.si_code = sicode; 1036 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 1037 0 stevel fault = FLTFPE; 1038 0 stevel } 1039 5849 sethg 1040 5849 sethg sti(); /* The SIMD exception comes in via cmninttrap */ 1041 0 stevel break; 1042 0 stevel 1043 0 stevel case T_BPTFLT: /* breakpoint trap */ 1044 0 stevel /* 1045 0 stevel * Kernel breakpoint traps should only happen when kmdb is 1046 0 stevel * active, and even then, it'll have interposed on the IDT, so 1047 0 stevel * control won't get here. If it does, we've hit a breakpoint 1048 0 stevel * without the debugger, which is very strange, and very 1049 0 stevel * fatal. 1050 0 stevel */ 1051 0 stevel if (tudebug && tudebugbpt) 1052 0 stevel showregs(type, rp, (caddr_t)0); 1053 0 stevel 1054 0 stevel (void) die(type, rp, addr, cpuid); 1055 0 stevel break; 1056 0 stevel 1057 0 stevel case T_SGLSTP: /* single step/hw breakpoint exception */ 1058 0 stevel 1059 0 stevel /* Now evaluate how we got here */ 1060 0 stevel if (lwp != NULL && (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP)) { 1061 0 stevel /* 1062 0 stevel * i386 single-steps even through lcalls which 1063 0 stevel * change the privilege level. So we take a trap at 1064 0 stevel * the first instruction in privileged mode. 1065 0 stevel * 1066 0 stevel * Set a flag to indicate that upon completion of 1067 0 stevel * the system call, deal with the single-step trap. 1068 0 stevel * 1069 0 stevel * The same thing happens for sysenter, too. 1070 0 stevel */ 1071 2712 nn35248 singlestep_twiddle = 0; 1072 2712 nn35248 if (rp->r_pc == (uintptr_t)sys_sysenter || 1073 2712 nn35248 rp->r_pc == (uintptr_t)brand_sys_sysenter) { 1074 2712 nn35248 singlestep_twiddle = 1; 1075 0 stevel #if defined(__amd64) 1076 0 stevel /* 1077 2712 nn35248 * Since we are already on the kernel's 1078 2712 nn35248 * %gs, on 64-bit systems the sysenter case 1079 2712 nn35248 * needs to adjust the pc to avoid 1080 2712 nn35248 * executing the swapgs instruction at the 1081 2712 nn35248 * top of the handler. 1082 0 stevel */ 1083 2712 nn35248 if (rp->r_pc == (uintptr_t)sys_sysenter) 1084 2712 nn35248 rp->r_pc = (uintptr_t) 1085 2712 nn35248 _sys_sysenter_post_swapgs; 1086 2712 nn35248 else 1087 2712 nn35248 rp->r_pc = (uintptr_t) 1088 2712 nn35248 _brand_sys_sysenter_post_swapgs; 1089 0 stevel #endif 1090 2712 nn35248 } 1091 2712 nn35248 #if defined(__i386) 1092 2712 nn35248 else if (rp->r_pc == (uintptr_t)sys_call || 1093 2712 nn35248 rp->r_pc == (uintptr_t)brand_sys_call) { 1094 2712 nn35248 singlestep_twiddle = 1; 1095 2712 nn35248 } 1096 2712 nn35248 #endif 1097 3003 dmick else { 1098 3003 dmick /* not on sysenter/syscall; uregs available */ 1099 3003 dmick if (tudebug && tudebugbpt) 1100 3003 dmick showregs(type, rp, (caddr_t)0); 1101 3003 dmick } 1102 2712 nn35248 if (singlestep_twiddle) { 1103 0 stevel rp->r_ps &= ~PS_T; /* turn off trace */ 1104 0 stevel lwp->lwp_pcb.pcb_flags |= DEBUG_PENDING; 1105 3446 mrj ct->t_post_sys = 1; 1106 2086 sudheer aston(curthread); 1107 0 stevel goto cleanup; 1108 0 stevel } 1109 0 stevel } 1110 0 stevel /* XXX - needs review on debugger interface? */ 1111 0 stevel if (boothowto & RB_DEBUG) 1112 0 stevel debug_enter((char *)NULL); 1113 0 stevel else 1114 0 stevel (void) die(type, rp, addr, cpuid); 1115 0 stevel break; 1116 0 stevel 1117 0 stevel case T_NMIFLT: /* NMI interrupt */ 1118 0 stevel printf("Unexpected NMI in system mode\n"); 1119 0 stevel goto cleanup; 1120 0 stevel 1121 0 stevel case T_NMIFLT + USER: /* NMI interrupt */ 1122 0 stevel printf("Unexpected NMI in user mode\n"); 1123 0 stevel break; 1124 0 stevel 1125 0 stevel case T_GPFLT: /* general protection violation */ 1126 0 stevel /* 1127 5639 gavinm * Any #GP that occurs during an on_trap .. no_trap bracket 1128 5639 gavinm * with OT_DATA_ACCESS or OT_SEGMENT_ACCESS protection, 1129 5639 gavinm * or in a on_fault .. no_fault bracket, is forgiven 1130 5639 gavinm * and we trampoline. This protection is given regardless 1131 5639 gavinm * of whether we are 32/64 bit etc - if a distinction is 1132 5639 gavinm * required then define new on_trap protection types. 1133 5639 gavinm * 1134 0 stevel * On amd64, we can get a #gp from referencing addresses 1135 5084 johnlev * in the virtual address hole e.g. from a copyin or in 1136 5084 johnlev * update_sregs while updating user segment registers. 1137 5084 johnlev * 1138 5084 johnlev * On the 32-bit hypervisor we could also generate one in 1139 5084 johnlev * mfn_to_pfn by reaching around or into where the hypervisor 1140 5084 johnlev * lives which is protected by segmentation. 1141 0 stevel */ 1142 0 stevel 1143 0 stevel /* 1144 0 stevel * If we're under on_trap() protection (see <sys/ontrap.h>), 1145 5254 gavinm * set ot_trap and trampoline back to the on_trap() call site 1146 5084 johnlev * for OT_DATA_ACCESS or OT_SEGMENT_ACCESS. 1147 0 stevel */ 1148 3446 mrj if (ct->t_ontrap != NULL) { 1149 5084 johnlev int ttype = ct->t_ontrap->ot_prot & 1150 5084 johnlev (OT_DATA_ACCESS | OT_SEGMENT_ACCESS); 1151 3446 mrj 1152 5084 johnlev if (ttype != 0) { 1153 5084 johnlev ct->t_ontrap->ot_trap |= ttype; 1154 5084 johnlev if (tudebug) 1155 5084 johnlev showregs(type, rp, (caddr_t)0); 1156 5254 gavinm rp->r_pc = ct->t_ontrap->ot_trampoline; 1157 5254 gavinm goto cleanup; 1158 5084 johnlev } 1159 0 stevel } 1160 0 stevel 1161 0 stevel /* 1162 0 stevel * If we're under lofault protection (copyin etc.), 1163 0 stevel * longjmp back to lofault with an EFAULT. 1164 0 stevel */ 1165 3446 mrj if (ct->t_lofault) { 1166 0 stevel /* 1167 0 stevel * Fault is not resolvable, so just return to lofault 1168 0 stevel */ 1169 0 stevel if (lodebug) { 1170 0 stevel showregs(type, rp, addr); 1171 0 stevel traceregs(rp); 1172 0 stevel } 1173 0 stevel rp->r_r0 = EFAULT; 1174 3446 mrj rp->r_pc = ct->t_lofault; 1175 0 stevel goto cleanup; 1176 0 stevel } 1177 5639 gavinm 1178 5639 gavinm /* 1179 5639 gavinm * We fall through to the next case, which repeats 1180 5639 gavinm * the OT_SEGMENT_ACCESS check which we've already 1181 5639 gavinm * done, so we'll always fall through to the 1182 5639 gavinm * T_STKFLT case. 1183 5639 gavinm */ 1184 0 stevel /*FALLTHROUGH*/ 1185 3446 mrj case T_SEGFLT: /* segment not present fault */ 1186 3446 mrj /* 1187 3446 mrj * One example of this is #NP in update_sregs while 1188 3446 mrj * attempting to update a user segment register 1189 3446 mrj * that points to a descriptor that is marked not 1190 3446 mrj * present. 1191 3446 mrj */ 1192 3446 mrj if (ct->t_ontrap != NULL && 1193 3446 mrj ct->t_ontrap->ot_prot & OT_SEGMENT_ACCESS) { 1194 3446 mrj ct->t_ontrap->ot_trap |= OT_SEGMENT_ACCESS; 1195 5084 johnlev if (tudebug) 1196 5084 johnlev showregs(type, rp, (caddr_t)0); 1197 5254 gavinm rp->r_pc = ct->t_ontrap->ot_trampoline; 1198 5254 gavinm goto cleanup; 1199 3446 mrj } 1200 3446 mrj /*FALLTHROUGH*/ 1201 0 stevel case T_STKFLT: /* stack fault */ 1202 0 stevel case T_TSSFLT: /* invalid TSS fault */ 1203 0 stevel if (tudebug) 1204 0 stevel showregs(type, rp, (caddr_t)0); 1205 0 stevel if (kern_gpfault(rp)) 1206 0 stevel (void) die(type, rp, addr, cpuid); 1207 0 stevel goto cleanup; 1208 0 stevel 1209 3446 mrj /* 1210 3446 mrj * ONLY 32-bit PROCESSES can USE a PRIVATE LDT! 64-bit apps 1211 3446 mrj * should have no need for them, so we put a stop to it here. 1212 3446 mrj * 1213 3446 mrj * So: not-present fault is ONLY valid for 32-bit processes with 1214 3446 mrj * a private LDT trying to do a system call. Emulate it. 1215 3446 mrj * 1216 3446 mrj * #gp fault is ONLY valid for 32-bit processes also, which DO NOT 1217 3446 mrj * have a private LDT, and are trying to do a system call. Emulate it. 1218 3446 mrj */ 1219 3446 mrj 1220 0 stevel case T_SEGFLT + USER: /* segment not present fault */ 1221 1217 rab case T_GPFLT + USER: /* general protection violation */ 1222 0 stevel #ifdef _SYSCALL32_IMPL 1223 1217 rab if (p->p_model != DATAMODEL_NATIVE) { 1224 1217 rab #endif /* _SYSCALL32_IMPL */ 1225 3939 sethg if (instr_is_lcall_syscall((caddr_t)rp->r_pc)) { 1226 1217 rab if (type == T_SEGFLT + USER) 1227 1217 rab ASSERT(p->p_ldt != NULL); 1228 1217 rab 1229 1217 rab if ((p->p_ldt == NULL && type == T_GPFLT + USER) || 1230 1217 rab type == T_SEGFLT + USER) { 1231 1217 rab 1232 0 stevel /* 1233 1217 rab * The user attempted a system call via the obsolete 1234 1217 rab * call gate mechanism. Because the process doesn't have 1235 1217 rab * an LDT (i.e. the ldtr contains 0), a #gp results. 1236 1217 rab * Emulate the syscall here, just as we do above for a 1237 1217 rab * #np trap. 1238 1217 rab */ 1239 1217 rab 1240 1217 rab /* 1241 0 stevel * Since this is a not-present trap, rp->r_pc points to 1242 0 stevel * the trapping lcall instruction. We need to bump it 1243 0 stevel * to the next insn so the app can continue on. 1244 0 stevel */ 1245 0 stevel rp->r_pc += LCALLSIZE; 1246 0 stevel lwp->lwp_regs = rp; 1247 0 stevel 1248 0 stevel /* 1249 0 stevel * Normally the microstate of the LWP is forced back to 1250 0 stevel * LMS_USER by the syscall handlers. Emulate that 1251 0 stevel * behavior here. 1252 0 stevel */ 1253 0 stevel mstate = LMS_USER; 1254 0 stevel 1255 0 stevel dosyscall(); 1256 0 stevel goto out; 1257 1217 rab } 1258 1217 rab } 1259 1217 rab #ifdef _SYSCALL32_IMPL 1260 0 stevel } 1261 0 stevel #endif /* _SYSCALL32_IMPL */ 1262 0 stevel /* 1263 0 stevel * If the current process is using a private LDT and the 1264 0 stevel * trapping instruction is sysenter, the sysenter instruction 1265 0 stevel * has been disabled on the CPU because it destroys segment 1266 0 stevel * registers. If this is the case, rewrite the instruction to 1267 0 stevel * be a safe system call and retry it. If this occurs on a CPU 1268 0 stevel * which doesn't even support sysenter, the result of all of 1269 0 stevel * this will be to emulate that particular instruction. 1270 0 stevel */ 1271 0 stevel if (p->p_ldt != NULL && 1272 3939 sethg ldt_rewrite_syscall(rp, p, X86_SEP)) 1273 3939 sethg goto out; 1274 3939 sethg 1275 0 stevel /*FALLTHROUGH*/ 1276 0 stevel 1277 0 stevel case T_BOUNDFLT + USER: /* bound fault */ 1278 0 stevel case T_STKFLT + USER: /* stack fault */ 1279 0 stevel case T_TSSFLT + USER: /* invalid TSS fault */ 1280 0 stevel if (tudebug) 1281 0 stevel showregs(type, rp, (caddr_t)0); 1282 0 stevel siginfo.si_signo = SIGSEGV; 1283 0 stevel siginfo.si_code = SEGV_MAPERR; 1284 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 1285 0 stevel fault = FLTBOUNDS; 1286 0 stevel break; 1287 0 stevel 1288 0 stevel case T_ALIGNMENT + USER: /* user alignment error (486) */ 1289 0 stevel if (tudebug) 1290 0 stevel showregs(type, rp, (caddr_t)0); 1291 0 stevel bzero(&siginfo, sizeof (siginfo)); 1292 0 stevel siginfo.si_signo = SIGBUS; 1293 0 stevel siginfo.si_code = BUS_ADRALN; 1294 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 1295 0 stevel fault = FLTACCESS; 1296 0 stevel break; 1297 0 stevel 1298 0 stevel case T_SGLSTP + USER: /* single step/hw breakpoint exception */ 1299 0 stevel if (tudebug && tudebugbpt) 1300 0 stevel showregs(type, rp, (caddr_t)0); 1301 0 stevel 1302 0 stevel /* Was it single-stepping? */ 1303 0 stevel if (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP) { 1304 0 stevel pcb_t *pcb = &lwp->lwp_pcb; 1305 0 stevel 1306 0 stevel rp->r_ps &= ~PS_T; 1307 0 stevel /* 1308 0 stevel * If both NORMAL_STEP and WATCH_STEP are in effect, 1309 2712 nn35248 * give precedence to WATCH_STEP. If neither is set, 1310 0 stevel * user must have set the PS_T bit in %efl; treat this 1311 0 stevel * as NORMAL_STEP. 1312 0 stevel */ 1313 2712 nn35248 if ((fault = undo_watch_step(&siginfo)) == 0 && 1314 2712 nn35248 ((pcb->pcb_flags & NORMAL_STEP) || 1315 2712 nn35248 !(pcb->pcb_flags & WATCH_STEP))) { 1316 0 stevel siginfo.si_signo = SIGTRAP; 1317 0 stevel siginfo.si_code = TRAP_TRACE; 1318 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 1319 0 stevel fault = FLTTRACE; 1320 0 stevel } 1321 0 stevel pcb->pcb_flags &= ~(NORMAL_STEP|WATCH_STEP); 1322 0 stevel } else { 1323 0 stevel cmn_err(CE_WARN, 1324 0 stevel "Unexpected INT 1 in user mode, dr6=%lx", 1325 0 stevel lwp->lwp_pcb.pcb_drstat); 1326 0 stevel } 1327 0 stevel break; 1328 0 stevel 1329 0 stevel case T_BPTFLT + USER: /* breakpoint trap */ 1330 0 stevel if (tudebug && tudebugbpt) 1331 0 stevel showregs(type, rp, (caddr_t)0); 1332 0 stevel /* 1333 0 stevel * int 3 (the breakpoint instruction) leaves the pc referring 1334 0 stevel * to the address one byte after the breakpointed address. 1335 0 stevel * If the P_PR_BPTADJ flag has been set via /proc, We adjust 1336 0 stevel * it back so it refers to the breakpointed address. 1337 0 stevel */ 1338 0 stevel if (p->p_proc_flag & P_PR_BPTADJ) 1339 0 stevel rp->r_pc--; 1340 0 stevel siginfo.si_signo = SIGTRAP; 1341 0 stevel siginfo.si_code = TRAP_BRKPT; 1342 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 1343 0 stevel fault = FLTBPT; 1344 0 stevel break; 1345 0 stevel 1346 0 stevel case T_AST: 1347 0 stevel /* 1348 0 stevel * This occurs only after the cs register has been made to 1349 0 stevel * look like a kernel selector, either through debugging or 1350 0 stevel * possibly by functions like setcontext(). The thread is 1351 0 stevel * about to cause a general protection fault at common_iret() 1352 0 stevel * in locore. We let that happen immediately instead of 1353 0 stevel * doing the T_AST processing. 1354 0 stevel */ 1355 0 stevel goto cleanup; 1356 0 stevel 1357 5254 gavinm case T_AST + USER: /* profiling, resched, h/w error pseudo trap */ 1358 5254 gavinm if (lwp->lwp_pcb.pcb_flags & ASYNC_HWERR) { 1359 5254 gavinm proc_t *p = ttoproc(curthread); 1360 9613 Abhinandan extern void print_msg_hwerr(ctid_t ct_id, proc_t *p); 1361 5254 gavinm 1362 5254 gavinm lwp->lwp_pcb.pcb_flags &= ~ASYNC_HWERR; 1363 9613 Abhinandan print_msg_hwerr(p->p_ct_process->conp_contract.ct_id, 1364 9613 Abhinandan p); 1365 5254 gavinm contract_process_hwerr(p->p_ct_process, p); 1366 5254 gavinm siginfo.si_signo = SIGKILL; 1367 5254 gavinm siginfo.si_code = SI_NOINFO; 1368 5254 gavinm } else if (lwp->lwp_pcb.pcb_flags & CPC_OVERFLOW) { 1369 0 stevel lwp->lwp_pcb.pcb_flags &= ~CPC_OVERFLOW; 1370 0 stevel if (kcpc_overflow_ast()) { 1371 0 stevel /* 1372 0 stevel * Signal performance counter overflow 1373 0 stevel */ 1374 0 stevel if (tudebug) 1375 0 stevel showregs(type, rp, (caddr_t)0); 1376 0 stevel bzero(&siginfo, sizeof (siginfo)); 1377 0 stevel siginfo.si_signo = SIGEMT; 1378 0 stevel siginfo.si_code = EMT_CPCOVF; 1379 0 stevel siginfo.si_addr = (caddr_t)rp->r_pc; 1380 0 stevel fault = FLTCPCOVF; 1381 0 stevel } 1382 0 stevel } 1383 5254 gavinm 1384 0 stevel break; 1385 0 stevel } 1386 0 stevel 1387 0 stevel /* 1388 0 stevel * We can't get here from a system trap 1389 0 stevel */ 1390 0 stevel ASSERT(type & USER); 1391 0 stevel 1392 0 stevel if (fault) { 1393 3506 af /* We took a fault so abort single step. */ 1394 3506 af lwp->lwp_pcb.pcb_flags &= ~(NORMAL_STEP|WATCH_STEP); 1395 0 stevel /* 1396 0 stevel * Remember the fault and fault adddress 1397 0 stevel * for real-time (SIGPROF) profiling. 1398 0 stevel */ 1399 0 stevel lwp->lwp_lastfault = fault; 1400 0 stevel lwp->lwp_lastfaddr = siginfo.si_addr; 1401 0 stevel 1402 0 stevel DTRACE_PROC2(fault, int, fault, ksiginfo_t *, &siginfo); 1403 0 stevel 1404 0 stevel /* 1405 0 stevel * If a debugger has declared this fault to be an 1406 0 stevel * event of interest, stop the lwp. Otherwise just 1407 0 stevel * deliver the associated signal. 1408 0 stevel */ 1409 0 stevel if (siginfo.si_signo != SIGKILL && 1410 0 stevel prismember(&p->p_fltmask, fault) && 1411 0 stevel stop_on_fault(fault, &siginfo) == 0) 1412 0 stevel siginfo.si_signo = 0; 1413 0 stevel } 1414 0 stevel 1415 0 stevel if (siginfo.si_signo) 1416 9384 Roger trapsig(&siginfo, (fault != FLTFPE && fault != FLTCPCOVF)); 1417 0 stevel 1418 0 stevel if (lwp->lwp_oweupc) 1419 0 stevel profil_tick(rp->r_pc); 1420 0 stevel 1421 3446 mrj if (ct->t_astflag | ct->t_sig_check) { 1422 0 stevel /* 1423 0 stevel * Turn off the AST flag before checking all the conditions that 1424 0 stevel * may have caused an AST. This flag is on whenever a signal or 1425 0 stevel * unusual condition should be handled after the next trap or 1426 0 stevel * syscall. 1427 0 stevel */ 1428 3446 mrj astoff(ct); 1429 2086 sudheer /* 1430 2086 sudheer * If a single-step trap occurred on a syscall (see above) 1431 2086 sudheer * recognize it now. Do this before checking for signals 1432 2086 sudheer * because deferred_singlestep_trap() may generate a SIGTRAP to 1433 2086 sudheer * the LWP or may otherwise mark the LWP to call issig(FORREAL). 1434 2086 sudheer */ 1435 2086 sudheer if (lwp->lwp_pcb.pcb_flags & DEBUG_PENDING) 1436 2086 sudheer deferred_singlestep_trap((caddr_t)rp->r_pc); 1437 2086 sudheer 1438 3446 mrj ct->t_sig_check = 0; 1439 0 stevel 1440 0 stevel mutex_enter(&p->p_lock); 1441 0 stevel if (curthread->t_proc_flag & TP_CHANGEBIND) { 1442 0 stevel timer_lwpbind(); 1443 0 stevel curthread->t_proc_flag &= ~TP_CHANGEBIND; 1444 0 stevel } 1445 0 stevel mutex_exit(&p->p_lock); 1446 0 stevel 1447 0 stevel /* 1448 0 stevel * for kaio requests that are on the per-process poll queue, 1449 0 stevel * aiop->aio_pollq, they're AIO_POLL bit is set, the kernel 1450 0 stevel * should copyout their result_t to user memory. by copying 1451 0 stevel * out the result_t, the user can poll on memory waiting 1452 0 stevel * for the kaio request to complete. 1453 0 stevel */ 1454 0 stevel if (p->p_aio) 1455 0 stevel aio_cleanup(0); 1456 0 stevel /* 1457 0 stevel * If this LWP was asked to hold, call holdlwp(), which will 1458 0 stevel * stop. holdlwps() sets this up and calls pokelwps() which 1459 0 stevel * sets the AST flag. 1460 0 stevel * 1461 0 stevel * Also check TP_EXITLWP, since this is used by fresh new LWPs 1462 0 stevel * through lwp_rtt(). That flag is set if the lwp_create(2) 1463 0 stevel * syscall failed after creating the LWP. 1464 0 stevel */ 1465 0 stevel if (ISHOLD(p)) 1466 0 stevel holdlwp(); 1467 0 stevel 1468 0 stevel /* 1469 0 stevel * All code that sets signals and makes ISSIG evaluate true must 1470 0 stevel * set t_astflag afterwards. 1471 0 stevel */ 1472 3446 mrj if (ISSIG_PENDING(ct, lwp, p)) { 1473 0 stevel if (issig(FORREAL)) 1474 0 stevel psig(); 1475 3446 mrj ct->t_sig_check = 1; 1476 0 stevel } 1477 0 stevel 1478 3446 mrj if (ct->t_rprof != NULL) { 1479 9870 Roger realsigprof(0, 0, 0); 1480 3446 mrj ct->t_sig_check = 1; 1481 0 stevel } 1482 1468 marx 1483 1468 marx /* 1484 1468 marx * /proc can't enable/disable the trace bit itself 1485 1468 marx * because that could race with the call gate used by 1486 1468 marx * system calls via "lcall". If that happened, an 1487 1468 marx * invalid EFLAGS would result. prstep()/prnostep() 1488 1468 marx * therefore schedule an AST for the purpose. 1489 1468 marx */ 1490 1468 marx if (lwp->lwp_pcb.pcb_flags & REQUEST_STEP) { 1491 1468 marx lwp->lwp_pcb.pcb_flags &= ~REQUEST_STEP; 1492 1468 marx rp->r_ps |= PS_T; 1493 1468 marx } 1494 1468 marx if (lwp->lwp_pcb.pcb_flags & REQUEST_NOSTEP) { 1495 1468 marx lwp->lwp_pcb.pcb_flags &= ~REQUEST_NOSTEP; 1496 1468 marx rp->r_ps &= ~PS_T; 1497 1468 marx } 1498 0 stevel } 1499 0 stevel 1500 0 stevel out: /* We can't get here from a system trap */ 1501 0 stevel ASSERT(type & USER); 1502 0 stevel 1503 0 stevel if (ISHOLD(p)) 1504 0 stevel holdlwp(); 1505 0 stevel 1506 0 stevel /* 1507 0 stevel * Set state to LWP_USER here so preempt won't give us a kernel 1508 0 stevel * priority if it occurs after this point. Call CL_TRAPRET() to 1509 0 stevel * restore the user-level priority. 1510 0 stevel * 1511 0 stevel * It is important that no locks (other than spinlocks) be entered 1512 0 stevel * after this point before returning to user mode (unless lwp_state 1513 0 stevel * is set back to LWP_SYS). 1514 0 stevel */ 1515 0 stevel lwp->lwp_state = LWP_USER; 1516 0 stevel 1517 3446 mrj if (ct->t_trapret) { 1518 3446 mrj ct->t_trapret = 0; 1519 3446 mrj thread_lock(ct); 1520 3446 mrj CL_TRAPRET(ct); 1521 3446 mrj thread_unlock(ct); 1522 0 stevel } 1523 3792 akolb if (CPU->cpu_runrun || curthread->t_schedflag & TS_ANYWAITQ) 1524 0 stevel preempt(); 1525 10230 Roger prunstop(); 1526 3446 mrj (void) new_mstate(ct, mstate); 1527 0 stevel 1528 0 stevel /* Kernel probe */ 1529 0 stevel TNF_PROBE_1(thread_state, "thread", /* CSTYLED */, 1530 0 stevel tnf_microstate, state, LMS_USER); 1531 0 stevel 1532 0 stevel return; 1533 0 stevel 1534 0 stevel cleanup: /* system traps end up here */ 1535 0 stevel ASSERT(!(type & USER)); 1536 0 stevel } 1537 0 stevel 1538 0 stevel /* 1539 0 stevel * Patch non-zero to disable preemption of threads in the kernel. 1540 0 stevel */ 1541 0 stevel int IGNORE_KERNEL_PREEMPTION = 0; /* XXX - delete this someday */ 1542 0 stevel 1543 0 stevel struct kpreempt_cnts { /* kernel preemption statistics */ 1544 0 stevel int kpc_idle; /* executing idle thread */ 1545 0 stevel int kpc_intr; /* executing interrupt thread */ 1546 0 stevel int kpc_clock; /* executing clock thread */ 1547 0 stevel int kpc_blocked; /* thread has blocked preemption (t_preempt) */ 1548 0 stevel int kpc_notonproc; /* thread is surrendering processor */ 1549 0 stevel int kpc_inswtch; /* thread has ratified scheduling decision */ 1550 0 stevel int kpc_prilevel; /* processor interrupt level is too high */ 1551 0 stevel int kpc_apreempt; /* asynchronous preemption */ 1552 0 stevel int kpc_spreempt; /* synchronous preemption */ 1553 0 stevel } kpreempt_cnts; 1554 0 stevel 1555 0 stevel /* 1556 0 stevel * kernel preemption: forced rescheduling, preempt the running kernel thread. 1557 0 stevel * the argument is old PIL for an interrupt, 1558 0 stevel * or the distingished value KPREEMPT_SYNC. 1559 0 stevel */ 1560 0 stevel void 1561 0 stevel kpreempt(int asyncspl) 1562 0 stevel { 1563 3446 mrj kthread_t *ct = curthread; 1564 0 stevel 1565 0 stevel if (IGNORE_KERNEL_PREEMPTION) { 1566 0 stevel aston(CPU->cpu_dispthread); 1567 0 stevel return; 1568 0 stevel } 1569 0 stevel 1570 0 stevel /* 1571 0 stevel * Check that conditions are right for kernel preemption 1572 0 stevel */ 1573 0 stevel do { 1574 3446 mrj if (ct->t_preempt) { 1575 0 stevel /* 1576 0 stevel * either a privileged thread (idle, panic, interrupt) 1577 8173 Pramod * or will check when t_preempt is lowered 1578 8173 Pramod * We need to specifically handle the case where 1579 8173 Pramod * the thread is in the middle of swtch (resume has 1580 8173 Pramod * been called) and has its t_preempt set 1581 8173 Pramod * [idle thread and a thread which is in kpreempt 1582 8173 Pramod * already] and then a high priority thread is 1583 8173 Pramod * available in the local dispatch queue. 1584 8173 Pramod * In this case the resumed thread needs to take a 1585 8173 Pramod * trap so that it can call kpreempt. We achieve 1586 8173 Pramod * this by using siron(). 1587 8173 Pramod * How do we detect this condition: 1588 8173 Pramod * idle thread is running and is in the midst of 1589 8173 Pramod * resume: curthread->t_pri == -1 && CPU->dispthread 1590 8173 Pramod * != CPU->thread 1591 8173 Pramod * Need to ensure that this happens only at high pil 1592 8173 Pramod * resume is called at high pil 1593 8173 Pramod * Only in resume_from_idle is the pil changed. 1594 0 stevel */ 1595 8173 Pramod if (ct->t_pri < 0) { 1596 0 stevel kpreempt_cnts.kpc_idle++; 1597 8173 Pramod if (CPU->cpu_dispthread != CPU->cpu_thread) 1598 8173 Pramod siron(); 1599 8173 Pramod } else if (ct->t_flag & T_INTR_THREAD) { 1600 0 stevel kpreempt_cnts.kpc_intr++; 1601 3446 mrj if (ct->t_pil == CLOCK_LEVEL) 1602 0 stevel kpreempt_cnts.kpc_clock++; 1603 8173 Pramod } else { 1604 0 stevel kpreempt_cnts.kpc_blocked++; 1605 8173 Pramod if (CPU->cpu_dispthread != CPU->cpu_thread) 1606 8173 Pramod siron(); 1607 8173 Pramod } 1608 0 stevel aston(CPU->cpu_dispthread); 1609 0 stevel return; 1610 0 stevel } 1611 3446 mrj if (ct->t_state != TS_ONPROC || 1612 3446 mrj ct->t_disp_queue != CPU->cpu_disp) { 1613 0 stevel /* this thread will be calling swtch() shortly */ 1614 0 stevel kpreempt_cnts.kpc_notonproc++; 1615 0 stevel if (CPU->cpu_thread != CPU->cpu_dispthread) { 1616 0 stevel /* already in swtch(), force another */ 1617 0 stevel kpreempt_cnts.kpc_inswtch++; 1618 0 stevel siron(); 1619 0 stevel } 1620 0 stevel return; 1621 0 stevel } 1622 0 stevel if (getpil() >= DISP_LEVEL) { 1623 0 stevel /* 1624 0 stevel * We can't preempt this thread if it is at 1625 0 stevel * a PIL >= DISP_LEVEL since it may be holding 1626 0 stevel * a spin lock (like sched_lock). 1627 0 stevel */ 1628 0 stevel siron(); /* check back later */ 1629 0 stevel kpreempt_cnts.kpc_prilevel++; 1630 0 stevel return; 1631 0 stevel } 1632 3446 mrj if (!interrupts_enabled()) { 1633 3446 mrj /* 1634 3446 mrj * Can't preempt while running with ints disabled 1635 3446 mrj */ 1636 3446 mrj kpreempt_cnts.kpc_prilevel++; 1637 3446 mrj return; 1638 3446 mrj } 1639 0 stevel if (asyncspl != KPREEMPT_SYNC) 1640 0 stevel kpreempt_cnts.kpc_apreempt++; 1641 0 stevel else 1642 0 stevel kpreempt_cnts.kpc_spreempt++; 1643 0 stevel 1644 3446 mrj ct->t_preempt++; 1645 0 stevel preempt(); 1646 3446 mrj ct->t_preempt--; 1647 0 stevel } while (CPU->cpu_kprunrun); 1648 0 stevel } 1649 0 stevel 1650 0 stevel /* 1651 0 stevel * Print out debugging info. 1652 0 stevel */ 1653 0 stevel static void 1654 0 stevel showregs(uint_t type, struct regs *rp, caddr_t addr) 1655 0 stevel { 1656 0 stevel int s; 1657 0 stevel 1658 0 stevel s = spl7(); 1659 0 stevel type &= ~USER; 1660 3446 mrj if (PTOU(curproc)->u_comm[0]) 1661 3446 mrj printf("%s: ", PTOU(curproc)->u_comm); 1662 0 stevel if (type < TRAP_TYPES) 1663 0 stevel printf("#%s %s\n", trap_type_mnemonic[type], trap_type[type]); 1664 0 stevel else 1665 0 stevel switch (type) { 1666 0 stevel case T_SYSCALL: 1667 0 stevel printf("Syscall Trap:\n"); 1668 0 stevel break; 1669 0 stevel case T_AST: 1670 0 stevel printf("AST\n"); 1671 0 stevel break; 1672 0 stevel default: 1673 0 stevel printf("Bad Trap = %d\n", type); 1674 0 stevel break; 1675 0 stevel } 1676 0 stevel if (type == T_PGFLT) { 1677 0 stevel printf("Bad %s fault at addr=0x%lx\n", 1678 0 stevel USERMODE(rp->r_cs) ? "user": "kernel", (uintptr_t)addr); 1679 0 stevel } else if (addr) { 1680 0 stevel printf("addr=0x%lx\n", (uintptr_t)addr); 1681 0 stevel } 1682 0 stevel 1683 0 stevel printf("pid=%d, pc=0x%lx, sp=0x%lx, eflags=0x%lx\n", 1684 0 stevel (ttoproc(curthread) && ttoproc(curthread)->p_pidp) ? 1685 0 stevel ttoproc(curthread)->p_pid : 0, rp->r_pc, rp->r_sp, rp->r_ps); 1686 0 stevel 1687 0 stevel #if defined(__lint) 1688 0 stevel /* 1689 0 stevel * this clause can be deleted when lint bug 4870403 is fixed 1690 0 stevel * (lint thinks that bit 32 is illegal in a %b format string) 1691 0 stevel */ 1692 0 stevel printf("cr0: %x cr4: %b\n", 1693 0 stevel (uint_t)getcr0(), (uint_t)getcr4(), FMT_CR4); 1694 0 stevel #else 1695 0 stevel printf("cr0: %b cr4: %b\n", 1696 0 stevel (uint_t)getcr0(), FMT_CR0, (uint_t)getcr4(), FMT_CR4); 1697 3446 mrj #endif /* __lint */ 1698 0 stevel 1699 5084 johnlev printf("cr2: %lx", getcr2()); 1700 5084 johnlev #if !defined(__xpv) 1701 5084 johnlev printf("cr3: %lx", getcr3()); 1702 0 stevel #if defined(__amd64) 1703 5084 johnlev printf("cr8: %lx\n", getcr8()); 1704 0 stevel #endif 1705 5084 johnlev #endif 1706 5084 johnlev printf("\n"); 1707 0 stevel 1708 0 stevel dumpregs(rp); 1709 0 stevel splx(s); 1710 0 stevel } 1711 0 stevel 1712 0 stevel static void 1713 0 stevel dumpregs(struct regs *rp) 1714 0 stevel { 1715 0 stevel #if defined(__amd64) 1716 0 stevel const char fmt[] = "\t%3s: %16lx %3s: %16lx %3s: %16lx\n"; 1717 0 stevel 1718 0 stevel printf(fmt, "rdi", rp->r_rdi, "rsi", rp->r_rsi, "rdx", rp->r_rdx); 1719 0 stevel printf(fmt, "rcx", rp->r_rcx, " r8", rp->r_r8, " r9", rp->r_r9); 1720 0 stevel printf(fmt, "rax", rp->r_rax, "rbx", rp->r_rbx, "rbp", rp->r_rbp); 1721 0 stevel printf(fmt, "r10", rp->r_r10, "r11", rp->r_r11, "r12", rp->r_r12); 1722 0 stevel printf(fmt, "r13", rp->r_r13, "r14", rp->r_r14, "r15", rp->r_r15); 1723 0 stevel 1724 3446 mrj printf(fmt, "fsb", rdmsr(MSR_AMD_FSBASE), "gsb", rdmsr(MSR_AMD_GSBASE), 1725 3446 mrj " ds", rp->r_ds); 1726 0 stevel printf(fmt, " es", rp->r_es, " fs", rp->r_fs, " gs", rp->r_gs); 1727 0 stevel 1728 0 stevel printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, "rip", rp->r_rip); 1729 0 stevel printf(fmt, " cs", rp->r_cs, "rfl", rp->r_rfl, "rsp", rp->r_rsp); 1730 0 stevel 1731 0 stevel printf("\t%3s: %16lx\n", " ss", rp->r_ss); 1732 0 stevel 1733 0 stevel #elif defined(__i386) 1734 0 stevel const char fmt[] = "\t%3s: %8lx %3s: %8lx %3s: %8lx %3s: %8lx\n"; 1735 0 stevel 1736 0 stevel printf(fmt, " gs", rp->r_gs, " fs", rp->r_fs, 1737 0 stevel " es", rp->r_es, " ds", rp->r_ds); 1738 0 stevel printf(fmt, "edi", rp->r_edi, "esi", rp->r_esi, 1739 0 stevel "ebp", rp->r_ebp, "esp", rp->r_esp); 1740 0 stevel printf(fmt, "ebx", rp->r_ebx, "edx", rp->r_edx, 1741 0 stevel "ecx", rp->r_ecx, "eax", rp->r_eax); 1742 0 stevel printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, 1743 0 stevel "eip", rp->r_eip, " cs", rp->r_cs); 1744 0 stevel printf("\t%3s: %8lx %3s: %8lx %3s: %8lx\n", 1745 0 stevel "efl", rp->r_efl, "usp", rp->r_uesp, " ss", rp->r_ss); 1746 0 stevel 1747 0 stevel #endif /* __i386 */ 1748 0 stevel } 1749 0 stevel 1750 0 stevel /* 1751 5084 johnlev * Test to see if the instruction is iret on i386 or iretq on amd64. 1752 5084 johnlev * 1753 5084 johnlev * On the hypervisor we can only test for nopop_sys_rtt_syscall. If true 1754 5084 johnlev * then we are in the context of hypervisor's failsafe handler because it 1755 5084 johnlev * tried to iret and failed due to a bad selector. See xen_failsafe_callback. 1756 5084 johnlev */ 1757 5084 johnlev static int 1758 5084 johnlev instr_is_iret(caddr_t pc) 1759 5084 johnlev { 1760 5084 johnlev 1761 5084 johnlev #if defined(__xpv) 1762 5084 johnlev extern void nopop_sys_rtt_syscall(void); 1763 5084 johnlev return ((pc == (caddr_t)nopop_sys_rtt_syscall) ? 1 : 0); 1764 5084 johnlev 1765 5084 johnlev #else 1766 5084 johnlev 1767 5084 johnlev #if defined(__amd64) 1768 5084 johnlev static const uint8_t iret_insn[2] = { 0x48, 0xcf }; /* iretq */ 1769 5084 johnlev 1770 5084 johnlev #elif defined(__i386) 1771 5084 johnlev static const uint8_t iret_insn[1] = { 0xcf }; /* iret */ 1772 5084 johnlev #endif /* __i386 */ 1773 5084 johnlev return (bcmp(pc, iret_insn, sizeof (iret_insn)) == 0); 1774 5084 johnlev 1775 5084 johnlev #endif /* __xpv */ 1776 5084 johnlev } 1777 5084 johnlev 1778 5084 johnlev #if defined(__i386) 1779 5084 johnlev 1780 5084 johnlev /* 1781 5084 johnlev * Test to see if the instruction is part of __SEGREGS_POP 1782 5084 johnlev * 1783 5084 johnlev * Note carefully the appallingly awful dependency between 1784 5084 johnlev * the instruction sequence used in __SEGREGS_POP and these 1785 5084 johnlev * instructions encoded here. 1786 5084 johnlev */ 1787 5084 johnlev static int 1788 5084 johnlev instr_is_segregs_pop(caddr_t pc) 1789 5084 johnlev { 1790 5084 johnlev static const uint8_t movw_0_esp_gs[4] = { 0x8e, 0x6c, 0x24, 0x0 }; 1791 5084 johnlev static const uint8_t movw_4_esp_fs[4] = { 0x8e, 0x64, 0x24, 0x4 }; 1792 5084 johnlev static const uint8_t movw_8_esp_es[4] = { 0x8e, 0x44, 0x24, 0x8 }; 1793 5084 johnlev static const uint8_t movw_c_esp_ds[4] = { 0x8e, 0x5c, 0x24, 0xc }; 1794 5084 johnlev 1795 5084 johnlev if (bcmp(pc, movw_0_esp_gs, sizeof (movw_0_esp_gs)) == 0 || 1796 5084 johnlev bcmp(pc, movw_4_esp_fs, sizeof (movw_4_esp_fs)) == 0 || 1797 5084 johnlev bcmp(pc, movw_8_esp_es, sizeof (movw_8_esp_es)) == 0 || 1798 5084 johnlev bcmp(pc, movw_c_esp_ds, sizeof (movw_c_esp_ds)) == 0) 1799 5084 johnlev return (1); 1800 5084 johnlev 1801 5084 johnlev return (0); 1802 5084 johnlev } 1803 5084 johnlev 1804 5084 johnlev #endif /* __i386 */ 1805 5084 johnlev 1806 5084 johnlev /* 1807 5084 johnlev * Test to see if the instruction is part of _sys_rtt. 1808 5084 johnlev * 1809 5084 johnlev * Again on the hypervisor if we try to IRET to user land with a bad code 1810 5084 johnlev * or stack selector we will get vectored through xen_failsafe_callback. 1811 5084 johnlev * In which case we assume we got here via _sys_rtt since we only allow 1812 5084 johnlev * IRET to user land to take place in _sys_rtt. 1813 5084 johnlev */ 1814 5084 johnlev static int 1815 5084 johnlev instr_is_sys_rtt(caddr_t pc) 1816 5084 johnlev { 1817 5084 johnlev extern void _sys_rtt(), _sys_rtt_end(); 1818 5084 johnlev 1819 5084 johnlev if ((uintptr_t)pc < (uintptr_t)_sys_rtt || 1820 5084 johnlev (uintptr_t)pc > (uintptr_t)_sys_rtt_end) 1821 5084 johnlev return (0); 1822 5084 johnlev 1823 5084 johnlev return (1); 1824 5084 johnlev } 1825 5084 johnlev 1826 5084 johnlev /* 1827 0 stevel * Handle #gp faults in kernel mode. 1828 0 stevel * 1829 0 stevel * One legitimate way this can happen is if we attempt to update segment 1830 0 stevel * registers to naughty values on the way out of the kernel. 1831 0 stevel * 1832 0 stevel * This can happen in a couple of ways: someone - either accidentally or 1833 0 stevel * on purpose - creates (setcontext(2), lwp_create(2)) or modifies 1834 0 stevel * (signal(2)) a ucontext that contains silly segment register values. 1835 0 stevel * Or someone - either accidentally or on purpose - modifies the prgregset_t 1836 0 stevel * of a subject process via /proc to contain silly segment register values. 1837 0 stevel * 1838 0 stevel * (The unfortunate part is that we can end up discovering the bad segment 1839 0 stevel * register value in the middle of an 'iret' after we've popped most of the 1840 0 stevel * stack. So it becomes quite difficult to associate an accurate ucontext 1841 0 stevel * with the lwp, because the act of taking the #gp trap overwrites most of 1842 0 stevel * what we were going to send the lwp.) 1843 0 stevel * 1844 0 stevel * OTOH if it turns out that's -not- the problem, and we're -not- an lwp 1845 0 stevel * trying to return to user mode and we get a #gp fault, then we need 1846 0 stevel * to die() -- which will happen if we return non-zero from this routine. 1847 0 stevel */ 1848 0 stevel static int 1849 0 stevel kern_gpfault(struct regs *rp) 1850 0 stevel { 1851 0 stevel kthread_t *t = curthread; 1852 0 stevel proc_t *p = ttoproc(t); 1853 0 stevel klwp_t *lwp = ttolwp(t); 1854 0 stevel struct regs tmpregs, *trp = NULL; 1855 0 stevel caddr_t pc = (caddr_t)rp->r_pc; 1856 0 stevel int v; 1857 0 stevel 1858 0 stevel /* 1859 5084 johnlev * if we're not an lwp, or in the case of running native the 1860 5084 johnlev * pc range is outside _sys_rtt, then we should immediately 1861 5084 johnlev * be die()ing horribly. 1862 0 stevel */ 1863 5084 johnlev if (lwp == NULL || !instr_is_sys_rtt(pc)) 1864 0 stevel return (1); 1865 0 stevel 1866 0 stevel /* 1867 0 stevel * So at least we're in the right part of the kernel. 1868 0 stevel * 1869 0 stevel * Disassemble the instruction at the faulting pc. 1870 0 stevel * Once we know what it is, we carefully reconstruct the stack 1871 0 stevel * based on the order in which the stack is deconstructed in 1872 0 stevel * _sys_rtt. Ew. 1873 0 stevel */ 1874 5084 johnlev if (instr_is_iret(pc)) { 1875 0 stevel /* 1876 5084 johnlev * We took the #gp while trying to perform the IRET. 1877 0 stevel * This means that either %cs or %ss are bad. 1878 0 stevel * All we know for sure is that most of the general 1879 0 stevel * registers have been restored, including the 1880 0 stevel * segment registers, and all we have left on the 1881 0 stevel * topmost part of the lwp's stack are the 1882 0 stevel * registers that the iretq was unable to consume. 1883 0 stevel * 1884 0 stevel * All the rest of the state was crushed by the #gp 1885 0 stevel * which pushed -its- registers atop our old save area 1886 0 stevel * (because we had to decrement the stack pointer, sigh) so 1887 0 stevel * all that we can try and do is to reconstruct the 1888 0 stevel * crushed frame from the #gp trap frame itself. 1889 0 stevel */ 1890 0 stevel trp = &tmpregs; 1891 0 stevel trp->r_ss = lwptoregs(lwp)->r_ss; 1892 0 stevel trp->r_sp = lwptoregs(lwp)->r_sp; 1893 0 stevel trp->r_ps = lwptoregs(lwp)->r_ps; 1894 0 stevel trp->r_cs = lwptoregs(lwp)->r_cs; 1895 0 stevel trp->r_pc = lwptoregs(lwp)->r_pc; 1896 0 stevel bcopy(rp, trp, offsetof(struct regs, r_pc)); 1897 0 stevel 1898 0 stevel /* 1899 0 stevel * Validate simple math 1900 0 stevel */ 1901 0 stevel ASSERT(trp->r_pc == lwptoregs(lwp)->r_pc); 1902 0 stevel ASSERT(trp->r_err == rp->r_err); 1903 0 stevel 1904 5084 johnlev 1905 5084 johnlev 1906 5084 johnlev } 1907 5084 johnlev 1908 5084 johnlev #if defined(__amd64) 1909 5084 johnlev if (trp == NULL && lwp->lwp_pcb.pcb_rupdate != 0) { 1910 5084 johnlev 1911 5084 johnlev /* 1912 5084 johnlev * This is the common case -- we're trying to load 1913 5084 johnlev * a bad segment register value in the only section 1914 5084 johnlev * of kernel code that ever loads segment registers. 1915 5084 johnlev * 1916 5084 johnlev * We don't need to do anything at this point because 1917 5084 johnlev * the pcb contains all the pending segment register 1918 5084 johnlev * state, and the regs are still intact because we 1919 5084 johnlev * didn't adjust the stack pointer yet. Given the fidelity 1920 5084 johnlev * of all this, we could conceivably send a signal 1921 5084 johnlev * to the lwp, rather than core-ing. 1922 5084 johnlev */ 1923 5084 johnlev trp = lwptoregs(lwp); 1924 5084 johnlev ASSERT((caddr_t)trp == (caddr_t)rp->r_sp); 1925 0 stevel } 1926 0 stevel 1927 0 stevel #elif defined(__i386) 1928 0 stevel 1929 5084 johnlev if (trp == NULL && instr_is_segregs_pop(pc)) 1930 5084 johnlev trp = lwptoregs(lwp); 1931 0 stevel 1932 5084 johnlev #endif /* __i386 */ 1933 0 stevel 1934 0 stevel if (trp == NULL) 1935 0 stevel return (1); 1936 0 stevel 1937 0 stevel /* 1938 0 stevel * If we get to here, we're reasonably confident that we've 1939 0 stevel * correctly decoded what happened on the way out of the kernel. 1940 0 stevel * Rewrite the lwp's registers so that we can create a core dump 1941 0 stevel * the (at least vaguely) represents the mcontext we were 1942 0 stevel * being asked to restore when things went so terribly wrong. 1943 0 stevel */ 1944 0 stevel 1945 0 stevel /* 1946 0 stevel * Make sure that we have a meaningful %trapno and %err. 1947 0 stevel */ 1948 0 stevel trp->r_trapno = rp->r_trapno; 1949 0 stevel trp->r_err = rp->r_err; 1950 0 stevel 1951 0 stevel if ((caddr_t)trp != (caddr_t)lwptoregs(lwp)) 1952 0 stevel bcopy(trp, lwptoregs(lwp), sizeof (*trp)); 1953 0 stevel 1954 5084 johnlev 1955 0 stevel mutex_enter(&p->p_lock); 1956 0 stevel lwp->lwp_cursig = SIGSEGV; 1957 0 stevel mutex_exit(&p->p_lock); 1958 0 stevel 1959 0 stevel /* 1960 5084 johnlev * Terminate all LWPs but don't discard them. If another lwp beat 1961 5084 johnlev * us to the punch by calling exit(), evaporate now. 1962 0 stevel */ 1963 390 raf proc_is_exiting(p); 1964 0 stevel if (exitlwps(1) != 0) { 1965 0 stevel mutex_enter(&p->p_lock); 1966 0 stevel lwp_exit(); 1967 0 stevel } 1968 0 stevel 1969 0 stevel if (audit_active) /* audit core dump */ 1970 0 stevel audit_core_start(SIGSEGV); 1971 0 stevel v = core(SIGSEGV, B_FALSE); 1972 0 stevel if (audit_active) /* audit core dump */ 1973 0 stevel audit_core_finish(v ? CLD_KILLED : CLD_DUMPED); 1974 0 stevel exit(v ? CLD_KILLED : CLD_DUMPED, SIGSEGV); 1975 0 stevel return (0); 1976 0 stevel } 1977 0 stevel 1978 0 stevel /* 1979 0 stevel * dump_tss() - Display the TSS structure 1980 0 stevel */ 1981 0 stevel 1982 5084 johnlev #if !defined(__xpv) 1983 0 stevel #if defined(__amd64) 1984 0 stevel 1985 0 stevel static void 1986 0 stevel dump_tss(void) 1987 0 stevel { 1988 0 stevel const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */ 1989 0 stevel struct tss *tss = CPU->cpu_tss; 1990 0 stevel 1991 0 stevel printf(tss_fmt, "tss_rsp0", (void *)tss->tss_rsp0); 1992 0 stevel printf(tss_fmt, "tss_rsp1", (void *)tss->tss_rsp1); 1993 0 stevel printf(tss_fmt, "tss_rsp2", (void *)tss->tss_rsp2); 1994 0 stevel 1995 0 stevel printf(tss_fmt, "tss_ist1", (void *)tss->tss_ist1); 1996 0 stevel printf(tss_fmt, "tss_ist2", (void *)tss->tss_ist2); 1997 0 stevel printf(tss_fmt, "tss_ist3", (void *)tss->tss_ist3); 1998 0 stevel printf(tss_fmt, "tss_ist4", (void *)tss->tss_ist4); 1999 0 stevel printf(tss_fmt, "tss_ist5", (void *)tss->tss_ist5); 2000 0 stevel printf(tss_fmt, "tss_ist6", (void *)tss->tss_ist6); 2001 0 stevel printf(tss_fmt, "tss_ist7", (void *)tss->tss_ist7); 2002 0 stevel } 2003 0 stevel 2004 0 stevel #elif defined(__i386) 2005 0 stevel 2006 0 stevel static void 2007 0 stevel dump_tss(void) 2008 0 stevel { 2009 0 stevel const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */ 2010 0 stevel struct tss *tss = CPU->cpu_tss; 2011 0 stevel 2012 286 dmick printf(tss_fmt, "tss_link", (void *)(uintptr_t)tss->tss_link); 2013 286 dmick printf(tss_fmt, "tss_esp0", (void *)(uintptr_t)tss->tss_esp0); 2014 286 dmick printf(tss_fmt, "tss_ss0", (void *)(uintptr_t)tss->tss_ss0); 2015 286 dmick printf(tss_fmt, "tss_esp1", (void *)(uintptr_t)tss->tss_esp1); 2016 286 dmick printf(tss_fmt, "tss_ss1", (void *)(uintptr_t)tss->tss_ss1); 2017 286 dmick printf(tss_fmt, "tss_esp2", (void *)(uintptr_t)tss->tss_esp2); 2018 286 dmick printf(tss_fmt, "tss_ss2", (void *)(uintptr_t)tss->tss_ss2); 2019 286 dmick printf(tss_fmt, "tss_cr3", (void *)(uintptr_t)tss->tss_cr3); 2020 286 dmick printf(tss_fmt, "tss_eip", (void *)(uintptr_t)tss->tss_eip); 2021 286 dmick printf(tss_fmt, "tss_eflags", (void *)(uintptr_t)tss->tss_eflags); 2022 286 dmick printf(tss_fmt, "tss_eax", (void *)(uintptr_t)tss->tss_eax); 2023 286 dmick printf(tss_fmt, "tss_ebx", (void *)(uintptr_t)tss->tss_ebx); 2024 286 dmick printf(tss_fmt, "tss_ecx", (void *)(uintptr_t)tss->tss_ecx); 2025 286 dmick printf(tss_fmt, "tss_edx", (void *)(uintptr_t)tss->tss_edx); 2026 286 dmick printf(tss_fmt, "tss_esp", (void *)(uintptr_t)tss->tss_esp); 2027 0 stevel } 2028 0 stevel 2029 0 stevel #endif /* __amd64 */ 2030 5084 johnlev #endif /* !__xpv */ 2031 0 stevel 2032 0 stevel #if defined(TRAPTRACE) 2033 0 stevel 2034 5084 johnlev int ttrace_nrec = 10; /* number of records to dump out */ 2035 5084 johnlev int ttrace_dump_nregs = 0; /* dump out this many records with regs too */ 2036 0 stevel 2037 0 stevel /* 2038 0 stevel * Dump out the last ttrace_nrec traptrace records on each CPU 2039 0 stevel */ 2040 0 stevel static void 2041 0 stevel dump_ttrace(void) 2042 0 stevel { 2043 0 stevel trap_trace_ctl_t *ttc; 2044 0 stevel trap_trace_rec_t *rec; 2045 0 stevel uintptr_t current; 2046 0 stevel int i, j, k; 2047 0 stevel int n = NCPU; 2048 0 stevel #if defined(__amd64) 2049 0 stevel const char banner[] = 2050 5084 johnlev "\ncpu address timestamp " 2051 5084 johnlev "type vc handler pc\n"; 2052 0 stevel const char fmt1[] = "%3d %016lx %12llx "; 2053 0 stevel #elif defined(__i386) 2054 0 stevel const char banner[] = 2055 5084 johnlev "\ncpu address timestamp type vc handler pc\n"; 2056 0 stevel const char fmt1[] = "%3d %08lx %12llx "; 2057 0 stevel #endif 2058 0 stevel const char fmt2[] = "%4s %3x "; 2059 0 stevel const char fmt3[] = "%8s "; 2060 0 stevel 2061 0 stevel if (ttrace_nrec == 0) 2062 0 stevel return; 2063 0 stevel 2064 0 stevel printf(banner); 2065 0 stevel 2066 0 stevel for (i = 0; i < n; i++) { 2067 0 stevel ttc = &trap_trace_ctl[i]; 2068 0 stevel if (ttc->ttc_first == NULL) 2069 0 stevel continue; 2070 0 stevel 2071 0 stevel current = ttc->ttc_next - sizeof (trap_trace_rec_t); 2072 0 stevel for (j = 0; j < ttrace_nrec; j++) { 2073 0 stevel struct sysent *sys; 2074 0 stevel struct autovec *vec; 2075 0 stevel extern struct av_head autovect[]; 2076 0 stevel int type; 2077 0 stevel ulong_t off; 2078 0 stevel char *sym, *stype; 2079 0 stevel 2080 0 stevel if (current < ttc->ttc_first) 2081 0 stevel current = 2082 0 stevel ttc->ttc_limit - sizeof (trap_trace_rec_t); 2083 0 stevel 2084 0 stevel if (current == NULL) 2085 0 stevel continue; 2086 0 stevel 2087 0 stevel rec = (trap_trace_rec_t *)current; 2088 0 stevel 2089 0 stevel if (rec->ttr_stamp == 0) 2090 0 stevel break; 2091 0 stevel 2092 0 stevel printf(fmt1, i, (uintptr_t)rec, rec->ttr_stamp); 2093 0 stevel 2094 0 stevel switch (rec->ttr_marker) { 2095 0 stevel case TT_SYSCALL: 2096 0 stevel case TT_SYSENTER: 2097 0 stevel case TT_SYSC: 2098 0 stevel case TT_SYSC64: 2099 0 stevel #if defined(__amd64) 2100 0 stevel sys = &sysent32[rec->ttr_sysnum]; 2101 0 stevel switch (rec->ttr_marker) { 2102 0 stevel case TT_SYSC64: 2103 0 stevel sys = &sysent[rec->ttr_sysnum]; 2104 0 stevel /*FALLTHROUGH*/ 2105 0 stevel #elif defined(__i386) 2106 0 stevel sys = &sysent[rec->ttr_sysnum]; 2107 0 stevel switch (rec->ttr_marker) { 2108 0 stevel case TT_SYSC64: 2109 0 stevel #endif 2110 0 stevel case TT_SYSC: 2111 0 stevel stype = "sysc"; /* syscall */ 2112 0 stevel break; 2113 0 stevel case TT_SYSCALL: 2114 0 stevel stype = "lcal"; /* lcall */ 2115 0 stevel break; 2116 0 stevel case TT_SYSENTER: 2117 0 stevel stype = "syse"; /* sysenter */ 2118 0 stevel break; 2119 0 stevel default: 2120 0 stevel break; 2121 0 stevel } 2122 0 stevel printf(fmt2, "sysc", rec->ttr_sysnum); 2123 0 stevel if (sys != NULL) { 2124 0 stevel sym = kobj_getsymname( 2125 0 stevel (uintptr_t)sys->sy_callc, 2126 0 stevel &off); 2127 0 stevel if (sym != NULL) 2128 3446 mrj printf(fmt3, sym); 2129 0 stevel else 2130 0 stevel printf("%p ", sys->sy_callc); 2131 0 stevel } else { 2132 3446 mrj printf(fmt3, "unknown"); 2133 0 stevel } 2134 0 stevel break; 2135 0 stevel 2136 0 stevel case TT_INTERRUPT: 2137 0 stevel printf(fmt2, "intr", rec->ttr_vector); 2138 0 stevel vec = (&autovect[rec->ttr_vector])->avh_link; 2139 0 stevel if (vec != NULL) { 2140 0 stevel sym = kobj_getsymname( 2141 0 stevel (uintptr_t)vec->av_vector, &off); 2142 0 stevel if (sym != NULL) 2143 3446 mrj printf(fmt3, sym); 2144 0 stevel else 2145 0 stevel printf("%p ", vec->av_vector); 2146 0 stevel } else { 2147 3446 mrj printf(fmt3, "unknown "); 2148 0 stevel } 2149 0 stevel break; 2150 0 stevel 2151 0 stevel case TT_TRAP: 2152 3446 mrj case TT_EVENT: 2153 0 stevel type = rec->ttr_regs.r_trapno; 2154 0 stevel printf(fmt2, "trap", type); 2155 3446 mrj if (type < TRAP_TYPES) 2156 3446 mrj printf(" #%s ", 2157 3446 mrj trap_type_mnemonic[type]); 2158 3446 mrj else 2159 3446 mrj switch (type) { 2160 3446 mrj case T_AST: 2161 3446 mrj printf(fmt3, "ast"); 2162 3446 mrj break; 2163 3446 mrj default: 2164 3446 mrj printf(fmt3, ""); 2165 3446 mrj break; 2166 3446 mrj } 2167 3446 mrj break; 2168 3446 mrj 2169 0 stevel default: 2170 0 stevel break; 2171 0 stevel } 2172 0 stevel 2173 0 stevel sym = kobj_getsymname(rec->ttr_regs.r_pc, &off); 2174 0 stevel if (sym != NULL) 2175 0 stevel printf("%s+%lx\n", sym, off); 2176 0 stevel else 2177 0 stevel printf("%lx\n", rec->ttr_regs.r_pc); 2178 0 stevel 2179 0 stevel if (ttrace_dump_nregs-- > 0) { 2180 0 stevel int s; 2181 0 stevel 2182 0 stevel if (rec->ttr_marker == TT_INTERRUPT) 2183 0 stevel printf( 2184 0 stevel "\t\tipl %x spl %x pri %x\n", 2185 0 stevel rec->ttr_ipl, 2186 0 stevel rec->ttr_spl, 2187 0 stevel rec->ttr_pri); 2188 0 stevel 2189 0 stevel dumpregs(&rec->ttr_regs); 2190 0 stevel 2191 0 stevel printf("\t%3s: %p\n\n", " ct", 2192 0 stevel (void *)rec->ttr_curthread); 2193 0 stevel 2194 0 stevel /* 2195 0 stevel * print out the pc stack that we recorded 2196 0 stevel * at trap time (if any) 2197 0 stevel */ 2198 0 stevel for (s = 0; s < rec->ttr_sdepth; s++) { 2199 0 stevel uintptr_t fullpc; 2200 0 stevel 2201 0 stevel if (s >= TTR_STACK_DEPTH) { 2202 0 stevel printf("ttr_sdepth corrupt\n"); 2203 0 stevel break; 2204 0 stevel } 2205 0 stevel 2206 0 stevel fullpc = (uintptr_t)rec->ttr_stack[s]; 2207 0 stevel 2208 0 stevel sym = kobj_getsymname(fullpc, &off); 2209 0 stevel if (sym != NULL) 2210 0 stevel printf("-> %s+0x%lx()\n", 2211 0 stevel sym, off); 2212 0 stevel else 2213 0 stevel printf("-> 0x%lx()\n", fullpc); 2214 0 stevel } 2215 0 stevel printf("\n"); 2216 0 stevel } 2217 0 stevel current -= sizeof (trap_trace_rec_t); 2218 0 stevel } 2219 0 stevel } 2220 0 stevel } 2221 0 stevel 2222 0 stevel #endif /* TRAPTRACE */ 2223 0 stevel 2224 0 stevel void 2225 5084 johnlev panic_showtrap(struct panic_trap_info *tip) 2226 0 stevel { 2227 0 stevel showregs(tip->trap_type, tip->trap_regs, tip->trap_addr); 2228 0 stevel 2229 0 stevel #if defined(TRAPTRACE) 2230 0 stevel dump_ttrace(); 2231 5084 johnlev #endif 2232 0 stevel 2233 5084 johnlev #if !defined(__xpv) 2234 0 stevel if (tip->trap_type == T_DBLFLT) 2235 0 stevel dump_tss(); 2236 5084 johnlev #endif 2237 0 stevel } 2238 0 stevel 2239 0 stevel void 2240 5084 johnlev panic_savetrap(panic_data_t *pdp, struct panic_trap_info *tip) 2241 0 stevel { 2242 0 stevel panic_saveregs(pdp, tip->trap_regs); 2243 0 stevel } 2244
Indexes created Sat Nov 28 14:09:03 UTC 2009
Terms of Use |
Privacy |
Trademarks |
Copyright Policy |
Site Guidelines |
Help
Your use of this web site or any of its content or software indicates your agreement to be bound by these Terms of Use.
Copyright © 1995-2008 Sun Microsystems, Inc.