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      1 /*
      2  * CDDL HEADER START
      3  *
      4  * The contents of this file are subject to the terms of the
      5  * Common Development and Distribution License (the "License").
      6  * You may not use this file except in compliance with the License.
      7  *
      8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
      9  * or http://www.opensolaris.org/os/licensing.
     10  * See the License for the specific language governing permissions
     11  * and limitations under the License.
     12  *
     13  * When distributing Covered Code, include this CDDL HEADER in each
     14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
     15  * If applicable, add the following below this CDDL HEADER, with the
     16  * fields enclosed by brackets "[]" replaced with your own identifying
     17  * information: Portions Copyright [yyyy] [name of copyright owner]
     18  *
     19  * CDDL HEADER END
     20  */
     21 /*
     22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
     23  * Use is subject to license terms.
     24  */
     25 
     26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
     27 
     28 #include <hpi_vir.h>
     29 #include <hxge_defs.h>
     30 #include <hxge_impl.h>
     31 
     32 /*
     33  * Set up a logical group number that a logical device belongs to.
     34  */
     35 hpi_status_t
     36 hpi_fzc_ldg_num_set(hpi_handle_t handle, uint8_t ld, uint8_t ldg)
     37 {
     38 	ld_grp_ctrl_t	gnum;
     39 
     40 	if (!LD_VALID(ld)) {
     41 		HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
     42 		    " hpi_fzc_ldg_num_set ld <0x%x>", ld));
     43 		return (HPI_FAILURE | HPI_VIR_LD_INVALID(ld));
     44 	}
     45 
     46 	if (!LDG_VALID(ldg)) {
     47 		HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
     48 		    " hpi_fzc_ldg_num_set ldg <0x%x>", ldg));
     49 		return (HPI_FAILURE | HPI_VIR_LDG_INVALID(ld));
     50 	}
     51 
     52 	gnum.value = 0;
     53 	gnum.bits.num = ldg;
     54 
     55 	HXGE_REG_WR32(handle, LD_GRP_CTRL + LD_NUM_OFFSET(ld), gnum.value);
     56 
     57 	return (HPI_SUCCESS);
     58 }
     59 
     60 /*
     61  * Get device state vectors.
     62  */
     63 hpi_status_t
     64 hpi_ldsv_ldfs_get(hpi_handle_t handle, uint8_t ldg, uint32_t *vector0_p,
     65     uint32_t *vector1_p)
     66 {
     67 	int	status;
     68 
     69 	if ((status = hpi_ldsv_get(handle, ldg, VECTOR0, vector0_p))) {
     70 		return (status);
     71 	}
     72 	if ((status = hpi_ldsv_get(handle, ldg, VECTOR1, vector1_p))) {
     73 		return (status);
     74 	}
     75 
     76 	return (HPI_SUCCESS);
     77 }
     78 
     79 /*
     80  * Get device state vectors.
     81  */
     82 hpi_status_t
     83 hpi_ldsv_get(hpi_handle_t handle, uint8_t ldg, ldsv_type_t vector,
     84     uint32_t *ldf_p)
     85 {
     86 	uint32_t	offset;
     87 
     88 	if (!LDG_VALID(ldg)) {
     89 		HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
     90 		    " hpi_ldsv_get Invalid Input ldg <0x%x>", ldg));
     91 		return (HPI_FAILURE | HPI_VIR_LDG_INVALID(ldg));
     92 	}
     93 
     94 	switch (vector) {
     95 	case VECTOR0:
     96 		offset = LDSV0 + LDSV_OFFSET(ldg);
     97 		break;
     98 
     99 	case VECTOR1:
    100 		offset = LDSV1 + LDSV_OFFSET(ldg);
    101 		break;
    102 
    103 	default:
    104 		HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
    105 		    " hpi_ldsv_get Invalid Input: ldsv type <0x%x>", vector));
    106 		return (HPI_FAILURE | HPI_VIR_LDSV_INVALID(vector));
    107 	}
    108 
    109 	HXGE_REG_RD32(handle, offset, ldf_p);
    110 
    111 	return (HPI_SUCCESS);
    112 }
    113 
    114 /*
    115  * Set the mask bits for both ldf0 and ldf1.
    116  */
    117 hpi_status_t
    118 hpi_intr_mask_set(hpi_handle_t handle, uint8_t ld, uint8_t ldf_mask)
    119 {
    120 	uint32_t	offset;
    121 
    122 	if (!LD_VALID(ld)) {
    123 		HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
    124 		    " hpi_intr_mask_set ld", ld));
    125 		return (HPI_FAILURE | HPI_VIR_LD_INVALID(ld));
    126 	}
    127 
    128 	ldf_mask &= LD_IM_MASK;
    129 	offset = LDSV_OFFSET_MASK(ld);
    130 
    131 	HPI_DEBUG_MSG((handle.function, HPI_VIR_CTL,
    132 	    "hpi_intr_mask_set: ld %d offset 0x%0x mask 0x%x",
    133 	    ld, offset, ldf_mask));
    134 
    135 	HXGE_REG_WR32(handle, offset, (uint32_t)ldf_mask);
    136 
    137 	return (HPI_SUCCESS);
    138 }
    139 
    140 /*
    141  * Set interrupt timer and arm bit.
    142  */
    143 hpi_status_t
    144 hpi_intr_ldg_mgmt_set(hpi_handle_t handle, uint8_t ldg, boolean_t arm,
    145     uint8_t timer)
    146 {
    147 	ld_intr_mgmt_t	mgm;
    148 
    149 	if (!LDG_VALID(ldg)) {
    150 		HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
    151 		    " hpi_intr_ldg_mgmt_set Invalid Input: ldg <0x%x>", ldg));
    152 		return (HPI_FAILURE | HPI_VIR_LDG_INVALID(ldg));
    153 	}
    154 
    155 	if (!LD_INTTIMER_VALID(timer)) {
    156 		HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
    157 		    " hpi_intr_ldg_mgmt_set Invalid Input"
    158 		    " timer <0x%x>", timer));
    159 		return (HPI_FAILURE | HPI_VIR_INTM_TM_INVALID(ldg));
    160 	}
    161 
    162 	if (arm) {
    163 		mgm.bits.arm = 1;
    164 	} else {
    165 		HXGE_REG_RD32(handle, LD_INTR_MGMT + LDSV_OFFSET(ldg),
    166 		    &mgm.value);
    167 	}
    168 
    169 	mgm.bits.timer = timer;
    170 	HXGE_REG_WR32(handle, LD_INTR_MGMT + LDSV_OFFSET(ldg), mgm.value);
    171 
    172 	HPI_DEBUG_MSG((handle.function, HPI_VIR_CTL,
    173 	    " hpi_intr_ldg_mgmt_set: ldg %d reg offset 0x%x",
    174 	    ldg, LD_INTR_MGMT + LDSV_OFFSET(ldg)));
    175 
    176 	return (HPI_SUCCESS);
    177 }
    178 
    179 /*
    180  * Set the timer resolution.
    181  */
    182 hpi_status_t
    183 hpi_fzc_ldg_timer_res_set(hpi_handle_t handle, uint32_t res)
    184 {
    185 	ld_intr_tim_res_t	tm;
    186 
    187 	if (res > LDGTITMRES_RES_MASK) {
    188 		HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
    189 		    " hpi_fzc_ldg_timer_res_set Invalid Input: res <0x%x>",
    190 		    res));
    191 		return (HPI_FAILURE | HPI_VIR_TM_RES_INVALID);
    192 	}
    193 
    194 	tm.value = 0;
    195 	tm.bits.res = res;
    196 
    197 	HXGE_REG_WR32(handle, LD_INTR_TIM_RES, tm.value);
    198 
    199 	return (HPI_SUCCESS);
    200 }
    201 
    202 /*
    203  * Set the system interrupt data.
    204  */
    205 hpi_status_t
    206 hpi_fzc_sid_set(hpi_handle_t handle, fzc_sid_t sid)
    207 {
    208 	sid_t	sd;
    209 
    210 	if (!LDG_VALID(sid.ldg)) {
    211 		HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
    212 		    " hpi_fzc_sid_set Invalid Input: ldg <0x%x>", sid.ldg));
    213 		return (HPI_FAILURE | HPI_VIR_LDG_INVALID(sid.ldg));
    214 	}
    215 
    216 	if (!SID_VECTOR_VALID(sid.vector)) {
    217 		HPI_ERROR_MSG((handle.function, HPI_ERR_CTL,
    218 		    " hpi_fzc_sid_set Invalid Input: vector <0x%x>",
    219 		    sid.vector));
    220 
    221 		return (HPI_FAILURE | HPI_VIR_SID_VEC_INVALID(sid.vector));
    222 	}
    223 
    224 	sd.value = 0;
    225 	sd.bits.data = sid.vector;
    226 	HXGE_REG_WR32(handle,  SID + LDG_SID_OFFSET(sid.ldg), sd.value);
    227 
    228 	return (HPI_SUCCESS);
    229 }
    230 
    231 /*
    232  * Mask/Unmask the device error mask bits.
    233  */
    234 hpi_status_t
    235 hpi_fzc_sys_err_mask_set(hpi_handle_t handle, boolean_t mask)
    236 {
    237 	dev_err_mask_t	dev_mask;
    238 
    239 	dev_mask.value = 0;
    240 	if (mask) {
    241 		dev_mask.bits.tdc_mask0 = 1;
    242 		dev_mask.bits.rdc_mask0 = 1;
    243 		dev_mask.bits.vnm_pio_mask1 = 1;
    244 		dev_mask.bits.tdc_mask1 = 1;
    245 		dev_mask.bits.rdc_mask1 = 1;
    246 		dev_mask.bits.peu_mask1 = 1;
    247 	}
    248 
    249 	HXGE_REG_WR32(handle, DEV_ERR_MASK, dev_mask.value);
    250 	return (HPI_SUCCESS);
    251 }
    252 
    253 /*
    254  * Get the system error stats.
    255  */
    256 hpi_status_t
    257 hpi_fzc_sys_err_stat_get(hpi_handle_t handle, dev_err_stat_t *statp)
    258 {
    259 	HXGE_REG_RD32(handle,  DEV_ERR_STAT, &statp->value);
    260 	return (HPI_SUCCESS);
    261 }
    262