1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma dictionary "PCIEX" 27 28 #include <fm/topo_hc.h> 29 30 /* 31 * FIT rates - assume leaf devices are somewhat less reliable than 32 * root complexes, switches and bridges 33 */ 34 #define PCIEX_RC_FIT 500 35 #define PCIEX_SW_FIT 500 36 #define PCIEX_BDG_FIT 500 37 #define PCIEX_DEV_FIT 1000 38 #define PCIEX_RC_INV_FIT 500 39 #define PCIEX_DEV_INV_FIT 1000 40 #define PCIEX_RC_NR_FIT 500 41 #define PCIEX_SW_NR_FIT 500 42 #define PCIEX_BDG_NR_FIT 500 43 #define PCIEX_DEV_NR_FIT 1000 44 #define PCIEX_BUS_FIT 500 45 #define PCIEX_BUS_NR_FIT 500 46 47 /* 48 * SERD parameters. 49 * 50 * PCI Express correctable link errors are automatically handled by the 51 * hardware, so have relatively little impact and we can allow quite a 52 * high frequency. We will also be quite conservative about nonfatal internal 53 * errors reported by the driver. 54 * 55 * Nonfatal dpe errors (ptlp/ecrc errors) have to be recovered by the hardened 56 * driver which may cause intermittant performance/responsiveness problems, so 57 * we have tighter serd parameters for these. These are most likely errors in 58 * buffers/caches within devices and bridges, so use similar rates to cpu 59 * data cache parity errors. 60 */ 61 #define CORRLINK_COUNT 6 62 #define CORRLINK_TIME 2h 63 #define BTLP_COUNT 6 64 #define BTLP_TIME 2h 65 #define BDLLP_COUNT 6 66 #define BDLLP_TIME 2h 67 #define RTO_COUNT 6 68 #define RTO_TIME 2h 69 #define RNR_COUNT 6 70 #define RNR_TIME 2h 71 #define RE_COUNT 6 72 #define RE_TIME 2h 73 #define NONFATAL_DPE_COUNT 3 74 #define NONFATAL_DPE_TIME 168h 75 76 /* 77 * if the source-id payload is valid, then check it matches 78 */ 79 #define SOURCE_ID_MATCHES_BDF \ 80 (!payloadprop_defined("source-valid") || \ 81 payloadprop("source-valid") == 0 || \ 82 payloadprop("source-id") == ((b << 8) | (d << 3) | f)) 83 84 #define SOURCE_ID_MATCHES_OWN_BDF \ 85 (payloadprop_defined("source-valid") && \ 86 payloadprop("source-valid") == 1 && \ 87 payloadprop("source-id") == (confprop(pciexrc, TOPO_PCI_BDF) + 0)) 88 89 /* 90 * Other useful macros. These use the EXCAP property (PCI Express Capabilities 91 * register) to find the type for PCI Express devices, and the CLASS-CODE 92 * property (PCI Class Code register) for to find the type of PCI devices behind 93 * a PCI Express-PCI bridge - note that 60400 and 60401 are defined as PCI-PCI 94 * bridges, everything else is consider a PCI leaf device. 95 */ 96 #define PCIEXFN pciexbus/pciexdev/pciexfn 97 #define PCIEXFNHZ pciexbus<>/pciexdev<>/pciexfn<> 98 #define PCIEXFN1 pciexbus[b]/pciexdev[d]/pciexfn[f] 99 #define PCIFN pcibus/pcidev/pcifn 100 #define PCIFNHZ pcibus<>/pcidev<>/pcifn<> 101 #define PCIFN1 pcibus[b]/pcidev[d]/pcifn[f] 102 #define IS_LF(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexdev") 103 #define IS_BG(f) (confprop(f, TOPO_PCI_EXCAP) == "pcibus") 104 #define IS_SD(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexswd") 105 #define IS_SU(f) (confprop(f, TOPO_PCI_EXCAP) == "pciexswu") 106 #define IS_PCI_LF(f) (confprop_defined(f, TOPO_PCI_CLASS) && \ 107 confprop(f, TOPO_PCI_CLASS) != "60400" && \ 108 confprop(f, TOPO_PCI_CLASS) != "60401") 109 110 /* 111 * define faults 112 */ 113 event fault.io.pciex.fw_corrupt@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0; 114 event fault.io.pciex.fw_mismatch@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0; 115 116 event fault.io.pciex.device-interr@PCIEXFN, FITrate=PCIEX_DEV_FIT; 117 118 event fault.io.pciex.device-interr-deg@PCIEXFN, FITrate=PCIEX_DEV_FIT, retire=0; 119 120 engine serd.io.pciex.flt-nf@PCIEXFN, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME; 121 event fault.io.pciex.device-interr-unaf@PCIEXFN, FITrate=PCIEX_DEV_FIT, 122 engine=serd.io.pciex.flt-nf@PCIEXFN; 123 124 engine serd.io.device.nonfatal@PCIEXFN, N=CORRLINK_COUNT, T=CORRLINK_TIME; 125 event fault.io.pciex.device-interr-corr@PCIEXFN, FITrate=PCIEX_DEV_FIT, 126 engine=serd.io.device.nonfatal@PCIEXFN; 127 engine serd.io.device.nonfatal@PCIEXFN/PCIEXFN, 128 N=CORRLINK_COUNT, T=CORRLINK_TIME; 129 event fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN, FITrate=PCIEX_DEV_FIT, 130 engine=serd.io.device.nonfatal@PCIEXFN/PCIEXFN; 131 engine serd.io.device.nonfatal@pciexrc/PCIEXFN, 132 N=CORRLINK_COUNT, T=CORRLINK_TIME; 133 event fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN, FITrate=PCIEX_DEV_FIT, 134 engine=serd.io.device.nonfatal@pciexrc/PCIEXFN; 135 136 event fault.io.pciex.device-interr@pciexrc, FITrate=PCIEX_RC_FIT; 137 138 event fault.io.pciex.device-interr-deg@pciexrc, FITrate=PCIEX_RC_FIT, retire=0; 139 140 engine serd.io.pciex.flt-nf@pciexrc, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME; 141 event fault.io.pciex.device-interr-unaf@pciexrc, FITrate=PCIEX_RC_FIT, 142 engine=serd.io.pciex.flt-nf@pciexrc; 143 144 engine serd.io.device.nonfatal@pciexrc, N=CORRLINK_COUNT, T=CORRLINK_TIME; 145 event fault.io.pciex.device-interr-corr@pciexrc, FITrate=PCIEX_RC_FIT, 146 engine=serd.io.device.nonfatal@pciexrc; 147 148 event fault.io.pciex.device-invreq@PCIEXFN, FITrate=PCIEX_DEV_INV_FIT; 149 150 event fault.io.pciex.device-invreq@pciexrc, FITrate=PCIEX_RC_FIT; 151 152 event fault.io.pciex.device-noresp@PCIEXFN, FITrate=PCIEX_DEV_NR_FIT; 153 154 event fault.io.pciex.device-noresp@pciexrc, FITrate=PCIEX_RC_NR_FIT; 155 156 event fault.io.pciex.bus-noresp@PCIEXFN, FITrate=PCIEX_BUS_NR_FIT; 157 158 event fault.io.pciex.bus-linkerr@PCIEXFN, FITrate=PCIEX_BUS_FIT; 159 160 engine serd.io.pciex.corrlink-bus@pciexrc/PCIEXFN, 161 N=CORRLINK_COUNT, T=CORRLINK_TIME; 162 event fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN, FITrate=PCIEX_BUS_FIT, 163 engine=serd.io.pciex.corrlink-bus@pciexrc/PCIEXFN; 164 engine serd.io.pciex.corrlink-bus@PCIEXFN/PCIEXFN, 165 N=CORRLINK_COUNT, T=CORRLINK_TIME; 166 event fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN, FITrate=PCIEX_BUS_FIT, 167 engine=serd.io.pciex.corrlink-bus@PCIEXFN/PCIEXFN; 168 169 /* 170 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 171 * Handling of leaf driver detected internal errors. Use serd engine if 172 * no service impact - otherwise fail immediately 173 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 174 */ 175 event ereport.io.device.inval_state@PCIEXFN{within(5s)}; 176 event ereport.io.device.no_response@PCIEXFN{within(5s)}; 177 event ereport.io.device.stall@PCIEXFN{within(5s)}; 178 event ereport.io.device.badint_limit@PCIEXFN{within(5s)}; 179 event ereport.io.device.intern_corr@PCIEXFN{within(5s)}; 180 event ereport.io.device.intern_uncorr@PCIEXFN{within(5s)}; 181 event ereport.io.service.lost@PCIEXFN{within(5s)}; 182 event ereport.io.service.degraded@PCIEXFN{within(5s)}; 183 event ereport.io.service.unaffected@PCIEXFN{within(5s)}; 184 event ereport.io.service.restored@PCIEXFN{within(30s)}; 185 event ereport.io.service.lost@PCIFN{within(5s)}; 186 event ereport.io.service.degraded@PCIFN{within(5s)}; 187 event ereport.io.service.unaffected@PCIFN{within(5s)}; 188 189 event error.io.pciex.noimpact-d@PCIEXFN; 190 event error.io.pciex.degraded-d@PCIEXFN; 191 event error.io.pciex.lost-d@PCIEXFN; 192 event error.io.service.restored@PCIEXFN; 193 event error.io.service.restored@PCIFN; 194 event error.io.device.nf-device@PCIEXFN; 195 event error.io.device.deg-device@PCIEXFN; 196 event error.io.device.f-device@PCIEXFN; 197 198 prop error.io.device.f-device@PCIEXFN (1)-> 199 ereport.io.device.inval_state@PCIEXFN, 200 ereport.io.device.no_response@PCIEXFN, 201 ereport.io.device.stall@PCIEXFN, 202 ereport.io.device.badint_limit@PCIEXFN, 203 ereport.io.device.intern_corr@PCIEXFN, 204 ereport.io.device.intern_uncorr@PCIEXFN; 205 206 prop error.io.device.f-device@PCIEXFN (0)-> 207 error.io.pciex.lost-d@PCIEXFN; 208 209 prop error.io.device.deg-device@PCIEXFN (1)-> 210 ereport.io.device.inval_state@PCIEXFN, 211 ereport.io.device.no_response@PCIEXFN, 212 ereport.io.device.stall@PCIEXFN, 213 ereport.io.device.badint_limit@PCIEXFN, 214 ereport.io.device.intern_corr@PCIEXFN, 215 ereport.io.device.intern_uncorr@PCIEXFN; 216 217 prop error.io.device.deg-device@PCIEXFN (1)-> 218 error.io.pciex.degraded-d@PCIEXFN; 219 220 prop error.io.device.nf-device@PCIEXFN (1)-> 221 ereport.io.device.inval_state@PCIEXFN, 222 ereport.io.device.no_response@PCIEXFN, 223 ereport.io.device.stall@PCIEXFN, 224 ereport.io.device.badint_limit@PCIEXFN, 225 ereport.io.device.intern_corr@PCIEXFN, 226 ereport.io.device.intern_uncorr@PCIEXFN; 227 228 prop error.io.device.nf-device@PCIEXFN (1)-> 229 error.io.pciex.noimpact-d@PCIEXFN; 230 231 /* 232 * handling of service impact ereports. 233 */ 234 prop error.io.pciex.lost-d@PCIEXFN (1)-> 235 ereport.io.service.lost@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 236 ereport.io.service.lost@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }; 237 238 prop error.io.pciex.lost-d@PCIEXFN (0)-> 239 ereport.io.service.unaffected@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 240 ereport.io.service.unaffected@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }, 241 ereport.io.service.degraded@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 242 ereport.io.service.degraded@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }; 243 244 prop error.io.pciex.degraded-d@PCIEXFN (1)-> 245 ereport.io.service.degraded@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 246 ereport.io.service.degraded@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }; 247 248 prop error.io.pciex.degraded-d@PCIEXFN (0)-> 249 ereport.io.service.unaffected@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 250 ereport.io.service.unaffected@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }; 251 252 prop error.io.pciex.noimpact-d@PCIEXFN (1)-> 253 ereport.io.service.unaffected@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 254 ereport.io.service.unaffected@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }, 255 error.io.service.restored@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 256 error.io.service.restored@PCIFNHZ { is_under(PCIEXFN, PCIFNHZ) }; 257 258 prop error.io.service.restored@PCIEXFN (1)-> 259 ereport.io.service.lost@PCIEXFN, 260 ereport.io.service.degraded@PCIEXFN; 261 262 prop error.io.service.restored@PCIEXFN (1)-> 263 ereport.io.service.restored@PCIEXFN; 264 265 /* 266 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 267 * A faulty PCI Express hostbridge (root complex) may cause: 268 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 269 * - nr-d: the device not to respond to a valid upstream request 270 * - ca-d: the device to completer abort a valid upstream request 271 * - mtlp-d: a malformed tlp to be transmitted downstream 272 * - badreq-d: a bad downstream request - not CRC error (may cause 273 * completer to respond with ur or ca) 274 * - ecrcreq-d: TLP with end-to-end CRC error transmitted downstream 275 * - ecrccomp-d: TLP with end-to-end CRC error transmitted downstream 276 * - poisreq-d: poisoned request transmitted downstream 277 * - poiscomp-d: poisoned completion transmitted downstream 278 * - corrlink: correctable link or physical level error 279 * - fatlink: fatal link or physical level error 280 */ 281 event error.io.pciex.nr-d@pciexrc/PCIEXFN; 282 event error.io.pciex.ca-d@pciexrc/PCIEXFN; 283 event error.io.pciex.mtlp-d@pciexrc/PCIEXFN; 284 event error.io.pciex.fatlink@pciexrc/PCIEXFN; 285 event error.io.pciex.badreq-d@pciexrc/PCIEXFN; 286 event error.io.pciex.nf-poisecrc-d@pciexrc/PCIEXFN; 287 event error.io.pciex.f-poisecrc-d@pciexrc/PCIEXFN; 288 event error.io.pciex.deg-poisecrc-d@pciexrc/PCIEXFN; 289 event ereport.io.pciex.dl.btlp@pciexrc{within(5s)}; 290 event ereport.io.pciex.dl.bdllp@pciexrc{within(5s)}; 291 event ereport.io.pciex.dl.rto@pciexrc{within(5s)}; 292 event ereport.io.pciex.dl.rnr@pciexrc{within(5s)}; 293 event ereport.io.pciex.pl.re@pciexrc{within(5s)}; 294 event ereport.io.pciex.dl.btlp@pciexrc/PCIEXFN{within(5s)}; 295 event ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFN{within(5s)}; 296 event ereport.io.pciex.dl.rto@pciexrc/PCIEXFN{within(5s)}; 297 event ereport.io.pciex.dl.rnr@pciexrc/PCIEXFN{within(5s)}; 298 event ereport.io.pciex.pl.re@pciexrc/PCIEXFN{within(5s)}; 299 300 prop fault.io.pciex.device-noresp@pciexrc (1)-> 301 error.io.pciex.nr-d@pciexrc/PCIEXFNHZ; 302 303 prop fault.io.pciex.device-invreq@pciexrc (1)-> 304 error.io.pciex.badreq-d@pciexrc/PCIEXFNHZ; 305 306 prop fault.io.pciex.device-interr-corr@pciexrc { 307 payloadprop_defined("detector") && setserdsuffix("_btlp") && 308 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 309 ereport.io.pciex.dl.btlp@pciexrc, 310 ereport.io.pciex.dl.btlp@pciexrc/PCIEXFNHZ; 311 312 prop fault.io.pciex.device-interr-corr@pciexrc { 313 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 314 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 315 ereport.io.pciex.dl.bdllp@pciexrc, 316 ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFNHZ; 317 318 prop fault.io.pciex.device-interr-corr@pciexrc { 319 payloadprop_defined("detector") && setserdsuffix("_rto") && 320 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 321 ereport.io.pciex.dl.rto@pciexrc, 322 ereport.io.pciex.dl.rto@pciexrc/PCIEXFNHZ; 323 324 prop fault.io.pciex.device-interr-corr@pciexrc { 325 payloadprop_defined("detector") && setserdsuffix("_rnr") && 326 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 327 ereport.io.pciex.dl.rnr@pciexrc, 328 ereport.io.pciex.dl.rnr@pciexrc/PCIEXFNHZ; 329 330 prop fault.io.pciex.device-interr-corr@pciexrc { 331 payloadprop_defined("detector") && setserdsuffix("_re") && 332 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 333 ereport.io.pciex.pl.re@pciexrc, 334 ereport.io.pciex.pl.re@pciexrc/PCIEXFNHZ; 335 336 prop fault.io.pciex.device-interr-unaf@pciexrc (1)-> 337 error.io.pciex.nf-poisecrc-d@pciexrc/PCIEXFNHZ; 338 339 prop fault.io.pciex.device-interr-deg@pciexrc (1)-> 340 error.io.pciex.deg-poisecrc-d@pciexrc/PCIEXFNHZ; 341 342 prop fault.io.pciex.device-interr@pciexrc (1)-> 343 error.io.pciex.f-poisecrc-d@pciexrc/PCIEXFNHZ, 344 error.io.pciex.ca-d@pciexrc/PCIEXFNHZ, 345 error.io.pciex.mtlp-d@pciexrc/PCIEXFNHZ, 346 error.io.pciex.fatlink@pciexrc/PCIEXFNHZ; 347 348 /* 349 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 350 * A faulty PCI Express leaf device or upstream switch port may cause: 351 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 352 * - flt-nr-u: the device not to respond to a valid downstream request 353 * - flt-ca-u: the device to completer abort a valid downstream request 354 * - flt-badreq-u: a bad upstream request - not CRC error (may cause 355 * completer to respond with ur or ca) - leaf only 356 * - flt-mtlp-u: a malformed tlp transmitted upstream - leaf only 357 * - flt-ecrcreq-u: request with end-to-end CRC error transmitted upstream 358 * - flt-ecrccomp-u: compl with end-to-end CRC error transmitted upstream 359 * - flt-poisreq-u: poisoned request transmitted upstream 360 * - flt-poiscomp-u: poisoned completion transmitted upstream 361 * - device: internal error reported by leaf device 362 * - corrlink: correctable link or physical level error 363 * - fatlink: fatal link or physical level error 364 */ 365 366 event error.io.pciex.flt-nr-u@PCIEXFN; 367 event error.io.pciex.flt-ca-u@PCIEXFN; 368 event error.io.pciex.flt-mtlp-u@PCIEXFN; 369 event error.io.pciex.fatlink@PCIEXFN; 370 event error.io.pciex.flt-badreq-u@PCIEXFN; 371 event error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 372 event error.io.pciex.flt-f-poisecrc-u@PCIEXFN; 373 event error.io.pciex.flt-deg-poisecrc-u@PCIEXFN; 374 event ereport.io.pciex.dl.btlp@PCIEXFN{within(5s)}; 375 event ereport.io.pciex.dl.bdllp@PCIEXFN{within(5s)}; 376 event ereport.io.pciex.dl.rto@PCIEXFN{within(5s)}; 377 event ereport.io.pciex.dl.rnr@PCIEXFN{within(5s)}; 378 event ereport.io.pciex.pl.re@PCIEXFN{within(5s)}; 379 event ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFN{within(5s)}; 380 event ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFN{within(5s)}; 381 event ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFN{within(5s)}; 382 event ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFN{within(5s)}; 383 event ereport.io.pciex.pl.re@PCIEXFN/PCIEXFN{within(5s)}; 384 event ereport.io.device.fw_corrupt@PCIEXFN{within(5s)}; 385 event ereport.io.device.fw_mismatch@PCIEXFN{within(5s)}; 386 387 prop fault.io.pciex.device-noresp@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 388 error.io.pciex.flt-nr-u@PCIEXFN; 389 390 prop fault.io.pciex.device-noresp@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 391 error.io.pciex.flt-nr-u@PCIEXFN; 392 393 prop fault.io.pciex.device-invreq@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 394 error.io.pciex.flt-badreq-u@PCIEXFN; 395 396 prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 397 payloadprop_defined("detector") && setserdsuffix("_btlp") && 398 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 399 ereport.io.pciex.dl.btlp@pciexrc, 400 ereport.io.pciex.dl.btlp@pciexrc/PCIEXFNHZ; 401 402 prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 403 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 404 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 405 ereport.io.pciex.dl.bdllp@pciexrc, 406 ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFNHZ; 407 408 prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 409 payloadprop_defined("detector") && setserdsuffix("_rto") && 410 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 411 ereport.io.pciex.dl.rto@pciexrc, 412 ereport.io.pciex.dl.rto@pciexrc/PCIEXFNHZ; 413 414 prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 415 payloadprop_defined("detector") && setserdsuffix("_rnr") && 416 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 417 ereport.io.pciex.dl.rnr@pciexrc, 418 ereport.io.pciex.dl.rnr@pciexrc/PCIEXFNHZ; 419 420 prop fault.io.pciex.device-interr-corr@pciexrc/PCIEXFN { 421 payloadprop_defined("detector") && setserdsuffix("_re") && 422 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 423 ereport.io.pciex.pl.re@pciexrc, 424 ereport.io.pciex.pl.re@pciexrc/PCIEXFNHZ; 425 426 prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 427 !IS_SD(PCIEXFN/PCIEXFN) && 428 payloadprop_defined("detector") && setserdsuffix("_btlp") && 429 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 430 ereport.io.pciex.dl.btlp@PCIEXFN, 431 ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFNHZ; 432 433 prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 434 !IS_SD(PCIEXFN/PCIEXFN) && 435 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 436 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 437 ereport.io.pciex.dl.bdllp@PCIEXFN, 438 ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFNHZ; 439 440 prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 441 !IS_SD(PCIEXFN/PCIEXFN) && 442 payloadprop_defined("detector") && setserdsuffix("_rto") && 443 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 444 ereport.io.pciex.dl.rto@PCIEXFN, 445 ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFNHZ; 446 447 prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 448 !IS_SD(PCIEXFN/PCIEXFN) && 449 payloadprop_defined("detector") && setserdsuffix("_rnr") && 450 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 451 ereport.io.pciex.dl.rnr@PCIEXFN, 452 ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFNHZ; 453 454 prop fault.io.pciex.device-interr-corr@PCIEXFN/PCIEXFN { 455 !IS_SD(PCIEXFN/PCIEXFN) && 456 payloadprop_defined("detector") && setserdsuffix("_re") && 457 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 458 ereport.io.pciex.pl.re@PCIEXFN, 459 ereport.io.pciex.pl.re@PCIEXFN/PCIEXFNHZ; 460 461 prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 462 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 463 464 prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 465 error.io.device.nf-device@PCIEXFN; 466 467 prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 468 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN; 469 470 prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 471 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN; 472 473 prop fault.io.pciex.device-interr@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 474 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 475 error.io.pciex.flt-ca-u@PCIEXFN, 476 error.io.pciex.fatlink@PCIEXFN; 477 478 prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 479 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN, 480 error.io.device.deg-device@PCIEXFN; 481 482 prop fault.io.pciex.device-interr@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 483 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 484 error.io.device.f-device@PCIEXFN, 485 error.io.pciex.flt-ca-u@PCIEXFN, 486 error.io.pciex.flt-mtlp-u@PCIEXFN, 487 error.io.pciex.fatlink@PCIEXFN; 488 489 prop fault.io.pciex.fw_corrupt@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 490 ereport.io.device.fw_corrupt@PCIEXFN; 491 492 prop fault.io.pciex.fw_corrupt@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 493 ereport.io.service.lost@PCIEXFN, 494 ereport.io.service.degraded@PCIEXFN; 495 496 prop fault.io.pciex.fw_mismatch@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 497 ereport.io.device.fw_mismatch@PCIEXFN; 498 499 prop fault.io.pciex.fw_mismatch@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 500 ereport.io.service.lost@PCIEXFN, 501 ereport.io.service.degraded@PCIEXFN; 502 503 /* 504 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 505 * A faulty PCI Express downstream switch port may cause 506 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 507 * - nr-d: the device not to respond to an upstream request 508 * - ca-d: the device to completer abort an upstream request 509 * - ecrcreq-d: TLP with end-to-end CRC error transmitted upstream 510 * - ecrccomp-d: TLP with end-to-end CRC error transmitted upstream 511 * - poisreq-d: poisoned request transmitted upstream 512 * - poiscomp-d: poisoned completion transmitted upstream 513 * - corrlink: correctable link or physical level error 514 * - fatlink: fatal link or physical level error 515 */ 516 517 event error.io.pciex.nr-d@PCIEXFN/PCIEXFN; 518 event error.io.pciex.ca-d@PCIEXFN/PCIEXFN; 519 event error.io.pciex.fatlink@PCIEXFN/PCIEXFN; 520 event error.io.pciex.nf-poisecrc-d@PCIEXFN/PCIEXFN; 521 event error.io.pciex.f-poisecrc-d@PCIEXFN/PCIEXFN; 522 event error.io.pciex.deg-poisecrc-d@PCIEXFN/PCIEXFN; 523 524 prop fault.io.pciex.device-noresp@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 525 error.io.pciex.nr-d@PCIEXFN/PCIEXFNHZ; 526 527 prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 528 payloadprop_defined("detector") && setserdsuffix("_btlp") && 529 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 530 ereport.io.pciex.dl.btlp@PCIEXFN, 531 ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFNHZ; 532 533 prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 534 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 535 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 536 ereport.io.pciex.dl.bdllp@PCIEXFN, 537 ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFNHZ; 538 539 prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 540 payloadprop_defined("detector") && setserdsuffix("_rto") && 541 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 542 ereport.io.pciex.dl.rto@PCIEXFN, 543 ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFNHZ; 544 545 prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 546 payloadprop_defined("detector") && setserdsuffix("_rnr") && 547 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 548 ereport.io.pciex.dl.rnr@PCIEXFN, 549 ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFNHZ; 550 551 prop fault.io.pciex.device-interr-corr@PCIEXFN { IS_SD(PCIEXFN) && 552 payloadprop_defined("detector") && setserdsuffix("_re") && 553 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 554 ereport.io.pciex.pl.re@PCIEXFN, 555 ereport.io.pciex.pl.re@PCIEXFN/PCIEXFNHZ; 556 557 prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 558 error.io.pciex.nf-poisecrc-d@PCIEXFN/PCIEXFNHZ; 559 560 prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 561 error.io.pciex.deg-poisecrc-d@PCIEXFN/PCIEXFNHZ; 562 563 prop fault.io.pciex.device-interr@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 564 error.io.pciex.ca-d@PCIEXFN/PCIEXFNHZ, 565 error.io.pciex.f-poisecrc-d@PCIEXFN/PCIEXFNHZ, 566 error.io.pciex.fatlink@PCIEXFN/PCIEXFNHZ; 567 568 /* 569 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 570 * A faulty PCIEX bus may cause: 571 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 572 * - flt-nr-u: a device to not respond because the link is down 573 * - nr-d: a device to not respond because the link is down 574 * - corrlink: correctable link or physical level error 575 * - fatlink: fatal link or physical level error 576 */ 577 578 event error.io.pciex.nr-d@PCIEXFN; 579 580 prop fault.io.pciex.bus-noresp@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 581 error.io.pciex.flt-nr-u@PCIEXFN, 582 error.io.pciex.nr-d@PCIEXFN; 583 584 prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 585 !IS_SD(PCIEXFN/PCIEXFN) && 586 payloadprop_defined("detector") && setserdsuffix("_btlp") && 587 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 588 ereport.io.pciex.dl.btlp@PCIEXFN, 589 ereport.io.pciex.dl.btlp@PCIEXFN/PCIEXFNHZ; 590 591 prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 592 !IS_SD(PCIEXFN/PCIEXFN) && 593 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 594 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 595 ereport.io.pciex.dl.bdllp@PCIEXFN, 596 ereport.io.pciex.dl.bdllp@PCIEXFN/PCIEXFNHZ; 597 598 prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 599 !IS_SD(PCIEXFN/PCIEXFN) && 600 payloadprop_defined("detector") && setserdsuffix("_rto") && 601 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 602 ereport.io.pciex.dl.rto@PCIEXFN, 603 ereport.io.pciex.dl.rto@PCIEXFN/PCIEXFNHZ; 604 605 prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 606 !IS_SD(PCIEXFN/PCIEXFN) && 607 payloadprop_defined("detector") && setserdsuffix("_rnr") && 608 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 609 ereport.io.pciex.dl.rnr@PCIEXFN, 610 ereport.io.pciex.dl.rnr@PCIEXFN/PCIEXFNHZ; 611 612 prop fault.io.pciex.bus-linkerr-corr@PCIEXFN/PCIEXFN { 613 !IS_SD(PCIEXFN/PCIEXFN) && 614 payloadprop_defined("detector") && setserdsuffix("_re") && 615 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 616 ereport.io.pciex.pl.re@PCIEXFN, 617 ereport.io.pciex.pl.re@PCIEXFN/PCIEXFNHZ; 618 619 prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 620 payloadprop_defined("detector") && setserdsuffix("_btlp") && 621 setserdn(BTLP_COUNT) && setserdt(BTLP_TIME) } (0)-> 622 ereport.io.pciex.dl.btlp@pciexrc, 623 ereport.io.pciex.dl.btlp@pciexrc/PCIEXFNHZ; 624 625 prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 626 payloadprop_defined("detector") && setserdsuffix("_bdllp") && 627 setserdn(BDLLP_COUNT) && setserdt(BDLLP_TIME) } (0)-> 628 ereport.io.pciex.dl.bdllp@pciexrc, 629 ereport.io.pciex.dl.bdllp@pciexrc/PCIEXFNHZ; 630 631 prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 632 payloadprop_defined("detector") && setserdsuffix("_rto") && 633 setserdn(RTO_COUNT) && setserdt(RTO_TIME) } (0)-> 634 ereport.io.pciex.dl.rto@pciexrc, 635 ereport.io.pciex.dl.rto@pciexrc/PCIEXFNHZ; 636 637 prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 638 payloadprop_defined("detector") && setserdsuffix("_rnr") && 639 setserdn(RNR_COUNT) && setserdt(RNR_TIME) } (0)-> 640 ereport.io.pciex.dl.rnr@pciexrc, 641 ereport.io.pciex.dl.rnr@pciexrc/PCIEXFNHZ; 642 643 prop fault.io.pciex.bus-linkerr-corr@pciexrc/PCIEXFN { 644 payloadprop_defined("detector") && setserdsuffix("_re") && 645 setserdn(RE_COUNT) && setserdt(RE_TIME) } (0)-> 646 ereport.io.pciex.pl.re@pciexrc, 647 ereport.io.pciex.pl.re@pciexrc/PCIEXFNHZ; 648 649 prop fault.io.pciex.bus-linkerr@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 650 error.io.pciex.fatlink@PCIEXFN; 651 652 /* 653 * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 654 * A faulty pciex-pci bridge may cause 655 * ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 656 * The following errors to propagate onto the PCI Express fabric 657 * - flt-nr-u: the device not to respond to a valid downstream request 658 * - flt-ca-u: the device to completer abort a valid downstream request 659 * - flt-ecrcreq-u: request with end-to-end CRC error transmitted upstream 660 * - flt-ecrccomp-u: compl with end-to-end CRC error transmitted upstream 661 * - flt-poisreq-u: poisoned request transmitted upstream 662 * - flt-poiscomp-u: poisoned completion transmitted upstream 663 * - corrlink: correctable link or physical level error upstream 664 * - fatlink: fatal link or physical level error upstream 665 * - sec-interr: internal error on pci express to pci bridge 666 * 667 * And the following errors to propagate onto the secondary pci or pci/x bus 668 * (these will be handled by code in the pci.esc file). 669 * - nr-pw-d: the device not to respond to a valid upstream request 670 * - nr-drw-d: the device not to respond to a valid upstream request 671 * - retry-to-d: failure to retry an downstream delayed request 672 * - ta-pw-d: the device responds with a ta to a valid upstream 673 * request 674 * - ta-drw-d: the device responds with a ta to a valid upstream 675 * request 676 * - ape-d: address/parity to get corrupted during downstream transmission. 677 * - dpe-d: data/parity to get corrupted during downstream transmission. 678 * - scpe-d: split completion to get corrupted during downstream transmission 679 */ 680 681 event error.io.pci.ape-d@PCIEXFN/PCIFN; 682 event error.io.pci.f-dpe-d@PCIEXFN/PCIFN; 683 event error.io.pci.deg-dpe-d@PCIEXFN/PCIFN; 684 event error.io.pci.nf-dpe-d@PCIEXFN/PCIFN; 685 event error.io.pci.retry-to-d@PCIEXFN/PCIFN; 686 event error.io.pci.nr-pw-d@PCIEXFN/PCIFN; 687 event error.io.pci.nr-drw-d@PCIEXFN/PCIFN; 688 event error.io.pci.ta-pw-d@PCIEXFN/PCIFN; 689 event error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 690 event error.io.pcix.scpe-d@PCIEXFN/PCIFN; 691 event error.io.pciex.sec-interr@PCIEXFN; 692 event ereport.io.pci.sec-sta@PCIEXFN{within(5s)}; 693 694 prop fault.io.pciex.device-noresp@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 695 error.io.pciex.flt-nr-u@PCIEXFN, 696 error.io.pci.retry-to-d@PCIEXFN/PCIFNHZ, 697 error.io.pci.nr-pw-d@PCIEXFN/PCIFNHZ, 698 error.io.pci.nr-drw-d@PCIEXFN/PCIFNHZ; 699 700 prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 701 error.io.pciex.flt-nf-poisecrc-u@PCIEXFN, 702 error.io.pci.nf-dpe-d@PCIEXFN/PCIFNHZ; 703 704 prop fault.io.pciex.device-interr-deg@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 705 error.io.pciex.flt-deg-poisecrc-u@PCIEXFN, 706 error.io.pci.deg-dpe-d@PCIEXFN/PCIFNHZ; 707 708 prop fault.io.pciex.device-interr@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 709 error.io.pciex.flt-f-poisecrc-u@PCIEXFN, 710 error.io.pciex.flt-ca-u@PCIEXFN, 711 error.io.pciex.flt-mtlp-u@PCIEXFN, 712 error.io.pciex.sec-interr@PCIEXFN, 713 error.io.pciex.fatlink@PCIEXFN, 714 error.io.pci.ta-pw-d@PCIEXFN/PCIFNHZ, 715 error.io.pci.ta-drw-d@PCIEXFN/PCIFNHZ, 716 error.io.pci.ape-d@PCIEXFN/PCIFNHZ, 717 error.io.pcix.scpe-d@PCIEXFN/PCIFNHZ, 718 error.io.pci.f-dpe-d@PCIEXFN/PCIFNHZ; 719 720 prop fault.io.pciex.device-interr-unaf@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 721 ereport.io.pci.sec-sta@PCIEXFN; 722 723 prop fault.io.pciex.device-interr@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 724 ereport.io.pci.sec-sta@PCIEXFN; 725 726 /* 727 * the following rules for ptlp and ecrc faults are split into fatal and 728 * nonfatal, depending on the service impact reported by the leaf driver 729 */ 730 event error.io.pciex.nf-poisecrc-d@PCIEXFN; 731 event error.io.pciex.deg-poisecrc-d@PCIEXFN; 732 event error.io.pciex.f-poisecrc-d@PCIEXFN; 733 event error.io.pciex.ecrcreq-d@PCIEXFN; 734 event error.io.pciex.ecrccomp-d@PCIEXFN; 735 event error.io.pciex.poisreq-d@PCIEXFN; 736 event error.io.pciex.poiscomp-d@PCIEXFN; 737 event error.io.pciex.flt-poisreq-u@PCIEXFN; 738 event error.io.pciex.flt-poiscomp-u@PCIEXFN; 739 event error.io.pciex.flt-ecrcreq-u@PCIEXFN; 740 event error.io.pciex.flt-ecrccomp-u@PCIEXFN; 741 742 prop error.io.pciex.nf-poisecrc-d@PCIEXFN (1)-> 743 error.io.pciex.ecrcreq-d@PCIEXFN, 744 error.io.pciex.ecrccomp-d@PCIEXFN, 745 error.io.pciex.poisreq-d@PCIEXFN, 746 error.io.pciex.poiscomp-d@PCIEXFN; 747 748 prop error.io.pciex.nf-poisecrc-d@PCIEXFN (1)-> 749 error.io.pciex.noimpact-d@PCIEXFN; 750 751 prop error.io.pciex.f-poisecrc-d@PCIEXFN (1)-> 752 error.io.pciex.ecrcreq-d@PCIEXFN, 753 error.io.pciex.ecrccomp-d@PCIEXFN, 754 error.io.pciex.poisreq-d@PCIEXFN, 755 error.io.pciex.poiscomp-d@PCIEXFN; 756 757 prop error.io.pciex.f-poisecrc-d@PCIEXFN (0)-> 758 error.io.pciex.lost-d@PCIEXFN; 759 760 prop error.io.pciex.deg-poisecrc-d@PCIEXFN (1)-> 761 error.io.pciex.ecrcreq-d@PCIEXFN, 762 error.io.pciex.ecrccomp-d@PCIEXFN, 763 error.io.pciex.poisreq-d@PCIEXFN, 764 error.io.pciex.poiscomp-d@PCIEXFN; 765 766 prop error.io.pciex.deg-poisecrc-d@PCIEXFN (1)-> 767 error.io.pciex.degraded-d@PCIEXFN; 768 769 prop error.io.pciex.flt-nf-poisecrc-u@PCIEXFN (1)-> 770 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 771 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 772 error.io.pciex.flt-poisreq-u@PCIEXFN, 773 error.io.pciex.flt-poiscomp-u@PCIEXFN; 774 775 prop error.io.pciex.flt-nf-poisecrc-u@PCIEXFN (1)-> 776 error.io.pciex.noimpact-d@PCIEXFN; 777 778 prop error.io.pciex.flt-deg-poisecrc-u@PCIEXFN (1)-> 779 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 780 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 781 error.io.pciex.flt-poisreq-u@PCIEXFN, 782 error.io.pciex.flt-poiscomp-u@PCIEXFN; 783 784 prop error.io.pciex.flt-deg-poisecrc-u@PCIEXFN (1)-> 785 error.io.pciex.degraded-d@PCIEXFN; 786 787 prop error.io.pciex.flt-f-poisecrc-u@PCIEXFN (1)-> 788 error.io.pciex.flt-ecrcreq-u@PCIEXFN, 789 error.io.pciex.flt-ecrccomp-u@PCIEXFN, 790 error.io.pciex.flt-poisreq-u@PCIEXFN, 791 error.io.pciex.flt-poiscomp-u@PCIEXFN; 792 793 prop error.io.pciex.flt-f-poisecrc-u@PCIEXFN (0)-> 794 error.io.pciex.lost-d@PCIEXFN; 795 796 /* 797 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 798 * declarations 799 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 800 */ 801 event error.io.pciex.fatal@PCIEXFN; 802 event error.io.pciex.nonfatal@PCIEXFN; 803 event error.io.pciex.nr-fwd-d@PCIEXFN; 804 event error.io.pciex.mtlp-fwd-d@PCIEXFN; 805 event error.io.pciex.flt-ur-u@PCIEXFN; 806 event error.io.pciex.mtlp-d@PCIEXFN; 807 event error.io.pciex.ca-d@PCIEXFN; 808 event error.io.pciex.ca-fwd-d@PCIEXFN; 809 event error.io.pciex.poisreq-fwd-d@PCIEXFN; 810 event error.io.pciex.poisreq-fwd-d@pciexrc/PCIEXFN; 811 event error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN; 812 event error.io.pciex.poiscomp-fwd-d@PCIEXFN; 813 event error.io.pciex.poiscomp-fwd-d@PCIEXFN/PCIEXFN; 814 event error.io.pciex.ecrcreq-fwd-d@PCIEXFN; 815 event error.io.pciex.ecrccomp-fwd-d@PCIEXFN; 816 event error.io.pciex.source-ecrcreq-u@PCIEXFN; 817 event error.io.pciex.source-ecrccomp-u@PCIEXFN; 818 event error.io.pciex.source-poiscomp-u@PCIEXFN; 819 event error.io.pciex.source-poisreq-u@PCIEXFN; 820 event error.io.pciex.badreq-d@PCIEXFN; 821 event error.io.pci.badreq-pw-d@PCIEXFN/PCIFN; 822 event error.io.pci.badreq-drw-d@PCIEXFN/PCIFN; 823 event error.io.pci.target-ma-d@PCIEXFN; 824 event error.io.pci.target-rta-d@PCIEXFN; 825 event error.io.pci.dpdata-pw-d@PCIEXFN/PCIFN; 826 event error.io.pci.dpdata-dw-d@PCIEXFN/PCIFN; 827 event error.io.pci.dpdata-dr-d@PCIEXFN/PCIFN; 828 event error.io.pciex.ca-u@PCIEXFN; 829 event error.io.pciex.ca-u@PCIEXFN/PCIEXFN; 830 event error.io.pciex.ca-u@pciexrc/PCIEXFN; 831 event error.io.pciex.ur-u@PCIEXFN; 832 event error.io.pciex.ur-u@PCIEXFN/PCIEXFN; 833 event error.io.pciex.ur-u@pciexrc/PCIEXFN; 834 event error.io.pciex.nr-u@PCIEXFN; 835 event error.io.pciex.nr-u@PCIEXFN/PCIEXFN; 836 event error.io.pciex.nr-u@pciexrc/PCIEXFN; 837 event error.io.pciex.mtlp-u@PCIEXFN; 838 event error.io.pciex.mtlp-u@PCIEXFN/PCIEXFN; 839 event error.io.pciex.mtlp-u@pciexrc/PCIEXFN; 840 event error.io.pciex.badreq-u@PCIEXFN; 841 event error.io.pciex.badreq-u@PCIEXFN/PCIEXFN; 842 event error.io.pciex.badreq-u@pciexrc/PCIEXFN; 843 event error.io.pciex.poisreq-u@PCIEXFN; 844 event error.io.pciex.poisreq-u@PCIEXFN/PCIEXFN; 845 event error.io.pciex.poisreq-u@pciexrc/PCIEXFN; 846 event error.io.pciex.poiscomp-u@PCIEXFN; 847 event error.io.pciex.poiscomp-u@PCIEXFN/PCIEXFN; 848 event error.io.pciex.poiscomp-u@pciexrc/PCIEXFN; 849 event error.io.pciex.ecrcreq-u@PCIEXFN; 850 event error.io.pciex.ecrcreq-u@PCIEXFN/PCIEXFN; 851 event error.io.pciex.ecrccomp-u@PCIEXFN; 852 event error.io.pciex.ecrccomp-u@PCIEXFN/PCIEXFN; 853 854 event ereport.io.pci.ma@PCIEXFN{within(5s)}; 855 event ereport.io.pci.mdpe@PCIEXFN{within(5s)}; 856 event ereport.io.pci.dpe@PCIEXFN{within(5s)}; 857 event ereport.io.pci.rta@PCIEXFN{within(5s)}; 858 event ereport.io.pci.sta@PCIEXFN{within(5s)}; 859 event ereport.io.pciex.dl.dllp@PCIEXFN{within(5s)}; 860 event ereport.io.pciex.pl.te@PCIEXFN{within(5s)}; 861 event ereport.io.pciex.tl.fcp@PCIEXFN{within(5s)}; 862 event ereport.io.pciex.tl.rof@PCIEXFN{within(5s)}; 863 event ereport.io.pciex.tl.mtlp@PCIEXFN{within(5s)}; 864 event ereport.io.pciex.tl.ur@PCIEXFN{within(5s)}; 865 event ereport.io.pciex.tl.ca@PCIEXFN{within(5s)}; 866 event ereport.io.pciex.tl.ptlp@PCIEXFN{within(5s)}; 867 event ereport.io.pciex.tl.ecrc@PCIEXFN{within(5s)}; 868 event ereport.io.pciex.tl.uc@PCIEXFN{within(5s)}; 869 event ereport.io.pciex.tl.cto@PCIEXFN{within(5s)}; 870 event ereport.io.pciex.dl.dllp@pciexrc{within(5s)}; 871 event ereport.io.pciex.pl.te@pciexrc{within(5s)}; 872 event ereport.io.pciex.tl.fcp@pciexrc{within(5s)}; 873 event ereport.io.pciex.tl.rof@pciexrc{within(5s)}; 874 event ereport.io.pciex.tl.mtlp@pciexrc{within(5s)}; 875 event ereport.io.pciex.tl.ur@pciexrc{within(5s)}; 876 event ereport.io.pciex.tl.ca@pciexrc{within(5s)}; 877 event ereport.io.pciex.tl.ptlp@pciexrc{within(5s)}; 878 event ereport.io.pciex.tl.ecrc@pciexrc{within(5s)}; 879 event ereport.io.pciex.tl.cto@pciexrc{within(5s)}; 880 event ereport.io.pci.sec-ma@pciexrc{within(5s)}; 881 event ereport.io.pci.sec-mdpe@pciexrc{within(5s)}; 882 event ereport.io.pci.sec-dpe@pciexrc{within(5s)}; 883 event ereport.io.pci.sec-rta@pciexrc{within(5s)}; 884 event ereport.io.pci.sec-sta@pciexrc{within(5s)}; 885 event ereport.io.pci.sec-mdpe@PCIEXFN{within(5s)}; 886 event ereport.io.pci.sec-dpe@PCIEXFN{within(5s)}; 887 event ereport.io.pci.sec-rserr@PCIEXFN{within(5s)}; 888 event ereport.io.pci.sserr@PCIEXFN{within(5s)}; 889 event ereport.io.pci.sec-rserr@pciexrc{within(5s)}; 890 event ereport.io.pciex.rc.fe-msg@pciexrc{within(5s)}; 891 event ereport.io.pciex.rc.nfe-msg@pciexrc{within(5s)}; 892 event ereport.io.pciex.rc.mue-msg@pciexrc{within(5s)}; 893 event ereport.io.pciex.bdg.sec-interr@PCIEXFN{within(5s)}; 894 event ereport.io.pciex.bdg.sec-ude@PCIEXFN{within(5s)}; 895 event ereport.io.pci.target-mdpe@PCIEXFN{within(5s)}; 896 event ereport.io.pci.target-mdpe@PCIFN{within(5s)}; 897 898 /* 899 * handling of fatal and nonfatal error messages propagated up to root complex 900 * 901 * Use these for errors reported by root-complex on behalf of another device. 902 * Can use source-id payload to identify where the message came from. 903 */ 904 prop error.io.pciex.fatal@PCIEXFN1 (1)-> 905 ereport.io.pciex.rc.mue-msg@pciexrc { is_under(pciexrc, PCIEXFN1) }, 906 ereport.io.pciex.rc.fe-msg@pciexrc { is_under(pciexrc, PCIEXFN1) && 907 SOURCE_ID_MATCHES_BDF }; 908 909 prop error.io.pciex.fatal@PCIEXFN (0)-> 910 ereport.io.pci.sserr@PCIEXFN; 911 912 prop error.io.pciex.fatal@PCIEXFN { is_under(PCIEXFN1, PCIEXFN) } (0)-> 913 ereport.io.pci.sserr@PCIEXFN1, 914 ereport.io.pci.sec-rserr@PCIEXFN1; 915 916 prop error.io.pciex.fatal@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 917 ereport.io.pci.sec-rserr@pciexrc; 918 919 prop error.io.pciex.nonfatal@PCIEXFN1 (1)-> 920 ereport.io.pciex.rc.mue-msg@pciexrc { is_under(pciexrc, PCIEXFN1) }, 921 ereport.io.pciex.rc.nfe-msg@pciexrc { is_under(pciexrc, PCIEXFN1) && 922 SOURCE_ID_MATCHES_BDF }; 923 924 prop error.io.pciex.nonfatal@PCIEXFN (0)-> 925 ereport.io.pci.sserr@PCIEXFN; 926 927 prop error.io.pciex.nonfatal@PCIEXFN { is_under(PCIEXFN1, PCIEXFN) } (0)-> 928 ereport.io.pci.sserr@PCIEXFN1, 929 ereport.io.pci.sec-rserr@PCIEXFN1; 930 931 prop error.io.pciex.nonfatal@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 932 ereport.io.pci.sec-rserr@pciexrc; 933 934 /* 935 * link-level errors - could generate ereports at either end of link 936 * 937 * can use may propagations here as these ereports are only seen for these 938 * faults. 939 */ 940 prop error.io.pciex.fatlink@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 941 error.io.pciex.fatal@PCIEXFN; 942 943 prop error.io.pciex.fatlink@PCIEXFN { !IS_SD(PCIEXFN) } (0)-> 944 ereport.io.pciex.dl.dllp@PCIEXFN, 945 ereport.io.pciex.tl.fcp@PCIEXFN, 946 ereport.io.pciex.tl.rof@PCIEXFN; 947 948 prop error.io.pciex.fatlink@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (0)-> 949 error.io.pciex.fatal@PCIEXFN; 950 951 prop error.io.pciex.fatlink@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (0)-> 952 ereport.io.pciex.dl.dllp@PCIEXFN, 953 ereport.io.pciex.pl.te@PCIEXFN, 954 ereport.io.pciex.tl.fcp@PCIEXFN, 955 ereport.io.pciex.tl.rof@PCIEXFN; 956 957 prop error.io.pciex.fatlink@pciexrc/PCIEXFN (0)-> 958 ereport.io.pciex.dl.dllp@pciexrc, 959 ereport.io.pciex.pl.te@pciexrc, 960 ereport.io.pciex.tl.fcp@pciexrc, 961 ereport.io.pciex.tl.rof@pciexrc; 962 963 /* 964 * bridge internal error 965 */ 966 prop error.io.pciex.sec-interr@PCIEXFN { IS_BG(PCIEXFN) } (2) -> 967 error.io.pciex.nonfatal@PCIEXFN, 968 ereport.io.pciex.bdg.sec-interr@PCIEXFN; 969 970 /* 971 * downstream poisoned request 972 * 973 * - poisreq-d cascades down to the leaf device/bridge and any switch ports 974 * on route must raise a ptlp ereport while any switch ports forwarding 975 * the poisoned request must raise sec-mdpe ereports. The originator of the 976 * poisoning (be it root complex or downstream port of a switch) also raises 977 * sec-mdpe. A hardened leaf driver will also raise ptlp. A target-mdpe may 978 * be seen at the leaf (which may be a pci device beyond the bridge). 979 * 980 * Additionally, the leaf/bridge may treat the request as a ur, which the 981 * root complex will see and report an ma. Use flt-ur-u to represent this. 982 * 983 * The fault can always be recognized and the source identified using the ptlp 984 * and sec-mdpe ereports. 985 */ 986 prop error.io.pciex.poisreq-d@PCIEXFN (1)-> 987 error.io.pciex.poisreq-fwd-d@PCIEXFN; 988 989 prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SD(PCIEXFN) || 990 IS_SU(PCIEXFN) } (1)-> 991 error.io.pciex.flt-ur-u@PCIEXFN, 992 error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFNHZ; 993 994 prop error.io.pciex.poisreq-fwd-d@pciexrc/PCIEXFN (1)-> 995 ereport.io.pci.sec-mdpe@pciexrc; 996 997 prop error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN { IS_SU(PCIEXFN) } (0)-> 998 ereport.io.pci.sec-mdpe@PCIEXFN; 999 1000 prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 1001 ereport.io.pci.dpe@PCIEXFN, 1002 ereport.io.pciex.tl.ptlp@PCIEXFN; 1003 1004 prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1005 error.io.pciex.nonfatal@PCIEXFN; 1006 1007 prop error.io.pciex.poisreq-fwd-d@PCIEXFN/PCIEXFN { IS_SD(PCIEXFN) } (1)-> 1008 ereport.io.pci.sec-mdpe@PCIEXFN; 1009 1010 prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1011 ereport.io.pci.dpe@PCIEXFN, 1012 ereport.io.pciex.tl.ptlp@PCIEXFN, 1013 error.io.pciex.nonfatal@PCIEXFN; 1014 1015 prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 1016 ereport.io.pci.dpe@PCIEXFN, 1017 ereport.io.pciex.tl.ptlp@PCIEXFN, 1018 error.io.pciex.nonfatal@PCIEXFN; 1019 1020 prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1021 error.io.pci.dpdata-pw-d@PCIEXFN/PCIFNHZ, 1022 error.io.pci.dpdata-dw-d@PCIEXFN/PCIFNHZ; 1023 1024 prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1025 error.io.pciex.nonfatal@PCIEXFN; 1026 1027 prop error.io.pciex.poisreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1028 ereport.io.pci.dpe@PCIEXFN, 1029 ereport.io.pciex.tl.ptlp@PCIEXFN, 1030 error.io.pciex.flt-ur-u@PCIEXFN; 1031 1032 prop error.io.pciex.poisreq-fwd-d@PCIEXFN (0)-> 1033 ereport.io.pci.target-mdpe@PCIEXFN; 1034 1035 /* 1036 * downstream poisoned completion 1037 * 1038 * - poiscomp-d cascades down to the leaf device/bridge and any switch ports on 1039 * route must raise ptlp and mdpe ereports. A hardened leaf driver will also 1040 * raise pltp and mdpe. For non-hardened leaf devices, no ptlp/mdpe may be 1041 * reported, and though we should still see a nonfatal error reported from 1042 * the root complex identifying the leaf device, we won't actually be informed 1043 * that the error was an ptlp. 1044 */ 1045 prop error.io.pciex.poiscomp-d@PCIEXFN (1)-> 1046 error.io.pciex.poiscomp-fwd-d@PCIEXFN; 1047 1048 prop error.io.pciex.poiscomp-fwd-d@PCIEXFN (1)-> 1049 error.io.pciex.poiscomp-fwd-d@PCIEXFN/PCIEXFNHZ; 1050 1051 prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 1052 ereport.io.pci.dpe@PCIEXFN, 1053 ereport.io.pciex.tl.ptlp@PCIEXFN; 1054 1055 prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 1056 ereport.io.pci.mdpe@PCIEXFN, 1057 ereport.io.pci.sec-mdpe@PCIEXFN; 1058 1059 prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1060 error.io.pciex.nonfatal@PCIEXFN; 1061 1062 prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1063 ereport.io.pci.mdpe@PCIEXFN, 1064 ereport.io.pci.sec-mdpe@PCIEXFN, 1065 ereport.io.pci.dpe@PCIEXFN, 1066 ereport.io.pciex.tl.ptlp@PCIEXFN, 1067 error.io.pciex.nonfatal@PCIEXFN; 1068 1069 prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (4)-> 1070 ereport.io.pci.mdpe@PCIEXFN, 1071 ereport.io.pci.dpe@PCIEXFN, 1072 ereport.io.pciex.tl.ptlp@PCIEXFN, 1073 error.io.pciex.nonfatal@PCIEXFN; 1074 1075 prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1076 error.io.pci.dpdata-dr-d@PCIEXFN/PCIFNHZ; 1077 1078 prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1079 error.io.pciex.nonfatal@PCIEXFN; 1080 1081 prop error.io.pciex.poiscomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1082 ereport.io.pci.mdpe@PCIEXFN, 1083 ereport.io.pci.dpe@PCIEXFN, 1084 ereport.io.pciex.tl.ptlp@PCIEXFN; 1085 1086 /* 1087 * downstream request with ecrc error. 1088 * 1089 * - ecrcreq-d cascades down to the leaf device/bridge and any switches on 1090 * route can optionally raise an ecrc ereport. A hardened leaf driver may also 1091 * raise ecrc. For non-hardened leaf devices, no ecrc may be reported, and 1092 * though we should still see a nonfatal error reported from the root complex 1093 * identifying the leaf device, we won't actually be informed that the error 1094 * was an ecrc. 1095 * 1096 * Additionally, as the leaf/bridge will just throw away the packet, we should 1097 * eventually get a cto at the root complex - so use an nr-u at the pciex 1098 * leaf or bridge to get the appropriate behaviour. For the case where the leaf 1099 * driver wasn't hardened we may be able to identify the leaf device (and 1100 * therefore any intermediate switches which might have caused the problem) 1101 * either via a target-ma ereport if available or via the nonfatal error 1102 * reported from the root complex identifying the leaf device. The combination 1103 * of a nonfatal error reported from the root complex and a cto from the root 1104 * complex is sufficient to positively identify this case. 1105 */ 1106 prop error.io.pciex.ecrcreq-d@PCIEXFN (1)-> 1107 error.io.pciex.ecrcreq-fwd-d@PCIEXFN, 1108 error.io.pciex.ecrcreq-fwd-d@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }; 1109 1110 prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 1111 IS_SD(PCIEXFN) } (1)-> 1112 error.io.pciex.flt-nr-u@PCIEXFN; 1113 1114 prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 1115 IS_SD(PCIEXFN) } (0)-> 1116 ereport.io.pciex.tl.ecrc@PCIEXFN, 1117 error.io.pciex.nonfatal@PCIEXFN; 1118 1119 prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 1120 error.io.pciex.nonfatal@PCIEXFN, 1121 ereport.io.pciex.tl.ecrc@PCIEXFN, 1122 error.io.pciex.flt-nr-u@PCIEXFN; 1123 1124 prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (2)-> 1125 error.io.pciex.nonfatal@PCIEXFN, 1126 error.io.pciex.flt-nr-u@PCIEXFN; 1127 1128 prop error.io.pciex.ecrcreq-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1129 ereport.io.pciex.tl.ecrc@PCIEXFN; 1130 1131 /* 1132 * downstream completion with ecrc error. 1133 * 1134 * - ecrccomp-d cascades down to the leaf device/bridge and any switches on 1135 * route can optionally raise an ecrc ereport. A hardened leaf driver may 1136 * also raise ecrc. For non-hardened leaf devices, no ecrc may be reported, 1137 * and though we should still see a nonfatal error reported from the root 1138 * complex identifying the leaf device, we won't actually be informed that 1139 * the error was an ecrc. 1140 * 1141 * Additionally, as the leaf/bridge will just throw away the packet, we should 1142 * eventually get a cto. Note the leaf ereports are optional (ie in case driver 1143 * not hardened) but if we get both ecrc and cto we need to distinguish from 1144 * cto only which would be an nr-d. 1145 */ 1146 prop error.io.pciex.ecrccomp-d@PCIEXFN (1)-> 1147 error.io.pciex.ecrccomp-fwd-d@PCIEXFN, 1148 error.io.pciex.ecrccomp-fwd-d@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }; 1149 1150 prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) || 1151 IS_SD(PCIEXFN) } (0)-> 1152 error.io.pciex.nonfatal@PCIEXFN, 1153 ereport.io.pciex.tl.ecrc@PCIEXFN; 1154 1155 prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (3)-> 1156 error.io.pciex.nonfatal@PCIEXFN, 1157 ereport.io.pciex.tl.ecrc@PCIEXFN, 1158 error.io.pciex.nr-d@PCIEXFN; 1159 1160 prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1161 error.io.pciex.nonfatal@PCIEXFN; 1162 1163 prop error.io.pciex.ecrccomp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1164 ereport.io.pciex.tl.ecrc@PCIEXFN, 1165 error.io.pciex.nr-d@PCIEXFN; 1166 1167 /* 1168 * upstream poisoned request 1169 * 1170 * - flt-poisreq-u is on the pciex node which generated the fault 1171 * - source-poisreq-u refers to at least one leaf or bridge device 1172 * whose bdf (if leaf) must match the source-id in the payload of the 1173 * ereport generated from the root complex. 1174 * - poisreq-u propagates up to the root complex and any switch ports on 1175 * route will raise a ptlp ereport, while any upstream devices generating 1176 * or forwarding the poisoned packed will raise an mdpe ereport. The root 1177 * complex should also report a ptlp. 1178 * 1179 * Additionally, as the root complex may treat the request as a ur, which the 1180 * leaf/bridge will see (and if hardened report) as an ma (including sending a 1181 * ta onto the child pci bus if this was a delayed write). 1182 * 1183 * We can always recognize what sort of fault this is from the ptlp (with no 1184 * sec-mdpe) at the root complex. Recognizing which originating devices may be 1185 * implicated can be done using the mdpe ereport (for a hardened leaf driver), 1186 * or for a non-hardened leaf driver by using the source-id payload in the ptlp 1187 * ereport to identify the originator of the request. The ptlp/mdpe ereports 1188 * at the intervening switches will narrow the fault down to a single suspect. 1189 */ 1190 1191 prop error.io.pciex.flt-poisreq-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1192 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1193 error.io.pciex.source-poisreq-u@PCIEXFN; 1194 1195 prop error.io.pciex.source-poisreq-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1196 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1197 ereport.io.pciex.tl.ptlp@pciexrc, 1198 ereport.io.pciex.tl.ur@pciexrc; 1199 1200 prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1201 ereport.io.pci.ma@PCIEXFN; 1202 1203 prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_BG(PCIEXFN) && 1204 is_under(pciexrc, PCIEXFN) } (0)-> 1205 ereport.io.pciex.tl.ptlp@pciexrc, 1206 ereport.io.pciex.tl.ur@pciexrc; 1207 1208 prop error.io.pciex.source-poisreq-u@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1209 ereport.io.pci.ma@PCIEXFN, 1210 ereport.io.pci.sec-sta@PCIEXFN, 1211 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1212 1213 prop error.io.pciex.flt-poisreq-u@PCIEXFN (1)-> 1214 error.io.pciex.poisreq-u@PCIEXFN; 1215 1216 /* 1217 * the remaining propagations are also used for poisoned requests propagating 1218 * up due to a fault behind a pcie-pci bridge 1219 */ 1220 prop error.io.pciex.poisreq-u@PCIEXFN/PCIEXFN (1)-> 1221 error.io.pciex.poisreq-u@PCIEXFN; 1222 1223 prop error.io.pciex.poisreq-u@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1224 ereport.io.pci.mdpe@PCIEXFN; 1225 1226 prop error.io.pciex.poisreq-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1227 ereport.io.pci.mdpe@PCIEXFN; 1228 1229 prop error.io.pciex.poisreq-u@PCIEXFN { IS_SD(PCIEXFN) } (2)-> 1230 ereport.io.pci.sec-dpe@PCIEXFN, 1231 ereport.io.pciex.tl.ptlp@PCIEXFN; 1232 1233 prop error.io.pciex.poisreq-u@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1234 ereport.io.pci.mdpe@PCIEXFN, 1235 error.io.pciex.nonfatal@PCIEXFN; 1236 1237 prop error.io.pciex.poisreq-u@PCIEXFN { IS_SU(PCIEXFN) } (1)-> 1238 ereport.io.pci.mdpe@PCIEXFN; 1239 1240 prop error.io.pciex.poisreq-u@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1241 ereport.io.pci.sec-dpe@PCIEXFN, 1242 ereport.io.pciex.tl.ptlp@PCIEXFN, 1243 error.io.pciex.nonfatal@PCIEXFN; 1244 1245 prop error.io.pciex.poisreq-u@pciexrc/PCIEXFN (1)-> 1246 ereport.io.pci.sec-dpe@pciexrc; 1247 1248 /* 1249 * upstream poisoned completion 1250 * 1251 * - flt-poiscomp-u is on the pciex node which generated the fault. There will 1252 * be a target-mdpe downstream from here. 1253 * - source-poiscomp-u refers to at least one leaf or bridge device 1254 * whose bdf (if leaf) must match the source-id in the payload of the 1255 * ereport generated from the root complex. 1256 * - poiscomp-u propagates up to the root complex and any switches on 1257 * route will raise ptlp and sec-mdpe ereports. The root complex will also 1258 * raise a sec-mdpe and ptlp. 1259 * 1260 * We can always recognize what sort of fault this is from the ptlp/sec-mdpe at 1261 * the root complex. Recognizing which originating devices may be implicated 1262 * can be done using the source-id payload in the ptlp ereport to identify the 1263 * originator of the completion. The ptlp/sec-mdpe ereports at the intervening 1264 * switches will narrow the fault down to a single suspect. 1265 */ 1266 prop error.io.pciex.flt-poiscomp-u@PCIEXFN { IS_LF(PCIEXFN1) && 1267 is_under(PCIEXFN, PCIEXFN1) } (0)-> 1268 ereport.io.pci.target-mdpe@PCIEXFN1; 1269 1270 prop error.io.pciex.flt-poiscomp-u@PCIEXFN { IS_PCI_LF(PCIFN) && 1271 is_under(PCIEXFN, PCIFN) } (0)-> 1272 ereport.io.pci.target-mdpe@PCIFN; 1273 1274 prop error.io.pciex.flt-poiscomp-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1275 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1276 error.io.pciex.source-poiscomp-u@PCIEXFN; 1277 1278 prop error.io.pciex.source-poiscomp-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1279 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1280 ereport.io.pciex.tl.ptlp@pciexrc; 1281 1282 prop error.io.pciex.source-poiscomp-u@PCIEXFN1 { IS_BG(PCIEXFN1) && 1283 is_under(pciexrc, PCIEXFN1) } (0)-> 1284 ereport.io.pciex.tl.ptlp@pciexrc; 1285 1286 prop error.io.pciex.flt-poiscomp-u@PCIEXFN (1)-> 1287 error.io.pciex.poiscomp-u@PCIEXFN; 1288 1289 /* 1290 * the remaining propagations are also used for poisoned completions propagating 1291 * up due to a fault behind a pcie-pci bridge 1292 */ 1293 prop error.io.pciex.poiscomp-u@PCIEXFN/PCIEXFN (1)-> 1294 error.io.pciex.poiscomp-u@PCIEXFN; 1295 1296 prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (2)-> 1297 ereport.io.pci.sec-dpe@PCIEXFN, 1298 ereport.io.pciex.tl.ptlp@PCIEXFN; 1299 1300 prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (1)-> 1301 ereport.io.pci.sec-mdpe@PCIEXFN, 1302 ereport.io.pci.mdpe@PCIEXFN; 1303 1304 prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SD(PCIEXFN) } (0)-> 1305 error.io.pciex.nonfatal@PCIEXFN; 1306 1307 prop error.io.pciex.poiscomp-u@PCIEXFN { IS_SU(PCIEXFN) } (0)-> 1308 ereport.io.pci.mdpe@PCIEXFN, 1309 ereport.io.pci.sec-mdpe@PCIEXFN, 1310 ereport.io.pci.sec-dpe@PCIEXFN, 1311 ereport.io.pciex.tl.ptlp@PCIEXFN, 1312 error.io.pciex.nonfatal@PCIEXFN; 1313 1314 prop error.io.pciex.poiscomp-u@pciexrc/PCIEXFN (1)-> 1315 ereport.io.pci.sec-dpe@pciexrc; 1316 1317 prop error.io.pciex.poiscomp-u@pciexrc/PCIEXFN (0)-> 1318 ereport.io.pci.sec-mdpe@pciexrc; 1319 1320 /* 1321 * upstream request with ecrc error. 1322 * 1323 * - flt-ecrcreq-u is on the pciex node which generated the fault. 1324 * - source-ecrcreq-u cascades down to at least one leaf device (pciex or pci), 1325 * whose bdf (if pciex) must match the source-id in the payload of the 1326 * ereport generated from the root complex. 1327 * - ecrcreq-u propagates up to the root complex which must report it with an 1328 * ecrc ereport and any switches on route can optionally raise an ecrc ereport 1329 * 1330 * Additionally, as the root complex will just throw away the packet, we may 1331 * eventually get a cto - so use an nr-d at the pciex leaf or bridge to get 1332 * the appropriate behaviour. 1333 * 1334 * We can always recognize what sort of fault this is from the ecrc (with no 1335 * cto) at the root complex. Recognizing which leaf device may be implicated 1336 * can be done from the cto ereport (for a hardened leaf driver) or for a 1337 * non-hardened leaf using the source-id payload of the ecrc. 1338 */ 1339 prop error.io.pciex.flt-ecrcreq-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1340 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1341 error.io.pciex.source-ecrcreq-u@PCIEXFN; 1342 1343 prop error.io.pciex.source-ecrcreq-u@PCIEXFN (0)-> 1344 error.io.pciex.nr-d@PCIEXFN; 1345 1346 prop error.io.pciex.source-ecrcreq-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1347 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1348 ereport.io.pciex.tl.ecrc@pciexrc; 1349 1350 prop error.io.pciex.source-ecrcreq-u@PCIEXFN { IS_BG(PCIEXFN) && 1351 is_under(pciexrc, PCIEXFN) } (0)-> 1352 ereport.io.pciex.tl.ecrc@pciexrc; 1353 1354 prop error.io.pciex.flt-ecrcreq-u@PCIEXFN (1)-> 1355 error.io.pciex.ecrcreq-u@PCIEXFN; 1356 1357 prop error.io.pciex.ecrcreq-u@PCIEXFN/PCIEXFN (1)-> 1358 error.io.pciex.ecrcreq-u@PCIEXFN; 1359 1360 prop error.io.pciex.ecrcreq-u@PCIEXFN { IS_SD(PCIEXFN)||IS_SU(PCIEXFN) } (0)-> 1361 ereport.io.pciex.tl.ecrc@PCIEXFN, 1362 error.io.pciex.nonfatal@PCIEXFN; 1363 1364 /* 1365 * upstream completion with ecrc error. 1366 * 1367 * - flt-ecrccomp-u is on the pciex node which generated the fault. 1368 * - source-ecrccomp-u cascades down to at least one leaf device (pciex or pci), 1369 * whose bdf (if pciex) must match the source-id in the payload of the 1370 * ereport generated from the root complex. 1371 * - ecrccomp-u propagates up to the root complex, which should report it with 1372 * an ecrc ereport and any switches on route can optionally raise an ecrc 1373 * ereport. 1374 * 1375 * Additionally, as the root complex will just throw away the packet, we'll 1376 * eventually get a cto - so use an flt-nr-u at the pciex leaf or bridge to get 1377 * the appropriate behaviour. 1378 * 1379 * We can always recognize what sort of fault this from the ecrc/cto from the 1380 * root complex. Recognizing which leaf device may be implicated can be done 1381 * using either the source-id payload of the ecrc or the target-ma ereport if 1382 * available. 1383 */ 1384 prop error.io.pciex.flt-ecrccomp-u@PCIEXFN1 { (IS_LF(PCIEXFN) || 1385 IS_BG(PCIEXFN)) && is_under(PCIEXFN1, PCIEXFN) } (0)-> 1386 error.io.pciex.source-ecrccomp-u@PCIEXFN; 1387 1388 prop error.io.pciex.source-ecrccomp-u@PCIEXFN (0)-> 1389 error.io.pciex.flt-nr-u@PCIEXFN; 1390 1391 prop error.io.pciex.source-ecrccomp-u@PCIEXFN1 { IS_LF(PCIEXFN1) && 1392 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1393 ereport.io.pciex.tl.ecrc@pciexrc; 1394 1395 prop error.io.pciex.source-ecrccomp-u@PCIEXFN { IS_BG(PCIEXFN) && 1396 is_under(pciexrc, PCIEXFN) } (0)-> 1397 ereport.io.pciex.tl.ecrc@pciexrc; 1398 1399 prop error.io.pciex.flt-ecrccomp-u@PCIEXFN (1)-> 1400 error.io.pciex.ecrccomp-u@PCIEXFN; 1401 1402 prop error.io.pciex.ecrccomp-u@PCIEXFN/PCIEXFN (1)-> 1403 error.io.pciex.ecrccomp-u@PCIEXFN; 1404 1405 prop error.io.pciex.ecrccomp-u@PCIEXFN { IS_SD(PCIEXFN)||IS_SU(PCIEXFN) } (0)-> 1406 ereport.io.pciex.tl.ecrc@PCIEXFN, 1407 error.io.pciex.nonfatal@PCIEXFN; 1408 1409 /* 1410 * no response to downstream requester 1411 * 1412 * - nr-d will effectively cascade downstream to the requester. The fault here 1413 * is always at the root complex. For a hardened leaf device driver, we will 1414 * always be able to recognize this as the requester will report this as a 1415 * cto. For non-hardened leaf devices, no cto will be reported, and though we 1416 * should still see a nonfatal error reported from the root complex 1417 * identifying the leaf device, we won't actually be informed that the error 1418 * was a cto. 1419 */ 1420 prop error.io.pciex.nr-d@PCIEXFN (1)-> 1421 error.io.pciex.nr-fwd-d@PCIEXFN { IS_BG(PCIEXFN) || IS_LF(PCIEXFN) }, 1422 error.io.pciex.nr-fwd-d@PCIEXFNHZ { (IS_BG(PCIEXFNHZ) || 1423 IS_LF(PCIEXFNHZ)) && is_under(PCIEXFN, PCIEXFNHZ) }; 1424 1425 prop error.io.pciex.nr-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (2)-> 1426 error.io.pciex.nonfatal@PCIEXFN, 1427 ereport.io.pciex.tl.cto@PCIEXFN; 1428 1429 prop error.io.pciex.nr-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1430 ereport.io.pci.ma@PCIEXFN, 1431 ereport.io.pci.sec-sta@PCIEXFN, 1432 error.io.pci.nr-drw-d@PCIEXFN/PCIFN, 1433 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1434 1435 prop error.io.pciex.nr-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1436 error.io.pciex.nonfatal@PCIEXFN; 1437 1438 prop error.io.pciex.nr-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1439 ereport.io.pci.ma@PCIEXFN, 1440 ereport.io.pciex.tl.cto@PCIEXFN; 1441 1442 /* 1443 * no response to upstream requester 1444 * 1445 * - flt-nr-u will effectively cascade upstream to the root complex which will 1446 * report it as a cto. 1447 * 1448 * We have to use target-ma to informs us which device failed to respond. 1449 */ 1450 prop error.io.pciex.flt-nr-u@PCIEXFN (1)-> 1451 error.io.pci.target-ma-d@PCIEXFN; 1452 1453 prop error.io.pciex.flt-nr-u@PCIEXFN (1)-> 1454 error.io.pciex.nr-u@PCIEXFN; 1455 1456 prop error.io.pciex.nr-u@PCIEXFN/PCIEXFN (1)-> 1457 error.io.pciex.nr-u@PCIEXFN; 1458 1459 prop error.io.pciex.nr-u@pciexrc/PCIEXFN (1)-> 1460 ereport.io.pciex.tl.cto@pciexrc; 1461 1462 prop error.io.pciex.nr-u@pciexrc/PCIEXFN (0)-> 1463 ereport.io.pci.sec-ma@pciexrc; 1464 1465 /* 1466 * downstream malformed tlp 1467 * 1468 * This will cascade downstream to the receiver which will report it as an mtlp. 1469 * For non-hardened leaf drivers, no mtlp will be reported, and though we should 1470 * still see a fatal error reported from the root complex identifying the leaf 1471 * device, we won't actually be informed that the error was a mtlp. 1472 * Note that sw-mtlp-d is to handle the case where the switch is actually 1473 * the target of the packet (config request etc). 1474 */ 1475 prop error.io.pciex.mtlp-d@PCIEXFN (1)-> 1476 error.io.pciex.mtlp-fwd-d@PCIEXFN { !IS_SD(PCIEXFN) }, 1477 error.io.pciex.mtlp-fwd-d@PCIEXFNHZ { !IS_SD(PCIEXFNHZ) && 1478 is_under(PCIEXFN, PCIEXFNHZ) }; 1479 1480 prop error.io.pciex.mtlp-fwd-d@PCIEXFN { IS_SU(PCIEXFN) } (2)-> 1481 error.io.pciex.fatal@PCIEXFN, 1482 ereport.io.pciex.tl.mtlp@PCIEXFN; 1483 1484 prop error.io.pciex.mtlp-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (2)-> 1485 error.io.pciex.fatal@PCIEXFN, 1486 ereport.io.pciex.tl.mtlp@PCIEXFN; 1487 1488 prop error.io.pciex.mtlp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1489 error.io.pciex.fatal@PCIEXFN; 1490 1491 prop error.io.pciex.mtlp-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1492 ereport.io.pciex.tl.mtlp@PCIEXFN; 1493 1494 /* 1495 * upstream malformed tlp 1496 * 1497 * This will cascade upstream to the receiver which will report it as an mtlp. 1498 */ 1499 prop error.io.pciex.flt-mtlp-u@PCIEXFN (1)-> 1500 error.io.pciex.mtlp-u@PCIEXFN; 1501 1502 prop error.io.pciex.mtlp-u@PCIEXFN/PCIEXFN (1)-> 1503 error.io.pciex.mtlp-u@PCIEXFN; 1504 1505 prop error.io.pciex.mtlp-u@pciexrc/PCIEXFN (1)-> 1506 ereport.io.pciex.tl.mtlp@pciexrc; 1507 1508 /* 1509 * downstream completer aborts 1510 * 1511 * This could be the fault of the root complex or a switch reporting an internal 1512 * error, or of the leaf device sending an invalid request (the latter is 1513 * handled by the flt-badreq-u case below). 1514 * 1515 * This is reported by the completer or by an intervening downstream switch 1516 * port. The completer abort response propagates down to the initiator which 1517 * will set the legacy pci bit rta. 1518 * 1519 * The fault can always be recognized by the ca ereport from the root complex 1520 * or downstream switch port. The originator of the request can be recognized 1521 * by the rta for a hardened driver or by using the source-id payload of the 1522 * ca ereport for a non-hardened driver. 1523 */ 1524 prop error.io.pciex.ca-d@pciexrc/PCIEXFN (0)-> 1525 ereport.io.pciex.tl.ca@pciexrc; 1526 1527 prop error.io.pciex.ca-d@pciexrc/PCIEXFN (1)-> 1528 ereport.io.pci.sec-sta@pciexrc; 1529 1530 prop error.io.pciex.ca-d@PCIEXFN/PCIEXFN (0)-> 1531 ereport.io.pci.sec-sta@PCIEXFN; 1532 1533 prop error.io.pciex.ca-d@PCIEXFN/PCIEXFN (2)-> 1534 ereport.io.pciex.tl.ca@PCIEXFN, 1535 error.io.pciex.nonfatal@PCIEXFN; 1536 1537 prop error.io.pciex.ca-d@PCIEXFN (1)-> 1538 error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) || IS_LF(PCIEXFN) }, 1539 error.io.pciex.ca-fwd-d@PCIEXFNHZ { (IS_BG(PCIEXFNHZ) || 1540 IS_LF(PCIEXFNHZ)) && is_under(PCIEXFN, PCIEXFNHZ) }; 1541 1542 prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1543 ereport.io.pci.rta@PCIEXFN; 1544 1545 prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_BG(PCIEXFN) } (0)-> 1546 ereport.io.pci.sec-sta@PCIEXFN, 1547 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1548 1549 prop error.io.pciex.ca-fwd-d@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1550 ereport.io.pci.rta@PCIEXFN; 1551 1552 /* 1553 * upstream completer aborts 1554 * 1555 * This could be the fault of the leaf device/bridge/upstream switch port 1556 * reporting an internal error, or of the root complex sending an invalid 1557 * request (the latter case is handled by badreq-d below). 1558 * 1559 * This is reported as a ca by the completer. The completer (for non-posted 1560 * requests) sends the appropriate error bits in the completion message to 1561 * the initiator which will set the legacy pci bit sec-rta. 1562 * 1563 * The fault can always be recognized from the sec-rta bit at the root complex. 1564 * 1565 * If the fault was with a PCI Express leaf with a hardened driver, then we 1566 * will identify the device from the ca ereport. 1567 * 1568 * If the fault was with a PCI Express leaf with a non-hardened driver, then we 1569 * can still identify the leaf device from the source-id payload of the nonfatal 1570 * message ereport from the root complex or from the target-rta ereport. 1571 */ 1572 prop error.io.pciex.flt-ca-u@PCIEXFN { !IS_LF(PCIEXFN) } (1)-> 1573 ereport.io.pciex.tl.ca@PCIEXFN; 1574 1575 prop error.io.pciex.flt-ca-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1576 ereport.io.pciex.tl.ca@PCIEXFN; 1577 1578 prop error.io.pciex.flt-ca-u@PCIEXFN (0)-> 1579 error.io.pciex.nonfatal@PCIEXFN, 1580 ereport.io.pci.sta@PCIEXFN; 1581 1582 prop error.io.pciex.flt-ca-u@PCIEXFN (2)-> 1583 error.io.pci.target-rta-d@PCIEXFN, 1584 error.io.pciex.ca-u@PCIEXFN; 1585 1586 prop error.io.pciex.ca-u@PCIEXFN/PCIEXFN (1)-> 1587 error.io.pciex.ca-u@PCIEXFN; 1588 1589 prop error.io.pciex.ca-u@pciexrc/PCIEXFN (0)-> 1590 ereport.io.pci.sec-rta@pciexrc; 1591 1592 /* 1593 * upstream bad request 1594 * 1595 * When detecting bad data on a request the completer (or any switch on the 1596 * way to the completer) may report ur or ca. If the switch detects the problem 1597 * first then the request doesn't get forwarded on to the completer. 1598 * 1599 * These are reported as ur/ca ereports. For non-posted requests, the reporter 1600 * then sends the appropriate error bits in the completion message to the 1601 * initiator which will set the legacy pci bits ma or rta. 1602 * 1603 * For flt-badreq-u, the ca/ur ereports contain a source-id payload that 1604 * identifies the initiator. 1605 * 1606 * The fault can always be recognized by the ca/ur ereport from the root 1607 * complex or downstream switch port. The originator of the request can be 1608 * recognized by the rta/ma for a hardened driver or by using the source-id 1609 * payload of the ca/ur ereport for a non-hardened driver. 1610 */ 1611 prop error.io.pciex.flt-badreq-u@PCIEXFN (0)-> 1612 ereport.io.pci.ma@PCIEXFN, 1613 ereport.io.pci.rta@PCIEXFN; 1614 1615 prop error.io.pciex.flt-badreq-u@PCIEXFN1 { 1616 SOURCE_ID_MATCHES_BDF && is_under(pciexrc, PCIEXFN1) } (0)-> 1617 ereport.io.pciex.tl.ur@pciexrc, 1618 ereport.io.pciex.tl.ca@pciexrc; 1619 1620 prop error.io.pciex.flt-badreq-u@PCIEXFN (1)-> 1621 error.io.pciex.badreq-u@PCIEXFN; 1622 1623 prop error.io.pciex.badreq-u@PCIEXFN/PCIEXFN (1)-> 1624 error.io.pciex.badreq-u@PCIEXFN; 1625 1626 prop error.io.pciex.badreq-u@pciexrc/PCIEXFN (0)-> 1627 ereport.io.pci.sec-sta@pciexrc; 1628 1629 prop error.io.pciex.flt-badreq-u@PCIEXFN1 { IS_SD(PCIEXFN) && 1630 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIEXFN1) } (0)-> 1631 ereport.io.pciex.tl.ur@PCIEXFN, 1632 ereport.io.pciex.tl.ca@PCIEXFN; 1633 1634 prop error.io.pciex.flt-badreq-u@PCIEXFN1 { IS_SD(PCIEXFN) && 1635 is_under(PCIEXFN, PCIEXFN1) } (0)-> 1636 ereport.io.pci.sec-sta@PCIEXFN, 1637 error.io.pciex.nonfatal@PCIEXFN; 1638 1639 /* 1640 * downstream bad request 1641 * 1642 * When detecting bad data on a request the completer (or any switch on the 1643 * way to the completer) may report ur or ca. If the switch detects the problem 1644 * first then the request doesn't get forwarded on to the completer. 1645 * 1646 * These are reported as ur/ca ereports (except where the completer is a non- 1647 * hardened leaf driver when all we get is a nonfatal error from the root 1648 * complex identifying the leaf device). The reporter then sends the appropriate 1649 * error bits in the completion message to the initiator which will set the 1650 * legacy pci bits ma or rta (oddly there is no equivalent in pcie error 1651 * reporting). 1652 */ 1653 prop error.io.pciex.badreq-d@PCIEXFN (1)-> 1654 error.io.pciex.flt-ur-u@PCIEXFN, 1655 error.io.pciex.flt-ca-u@PCIEXFN, 1656 error.io.pciex.flt-ur-u@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 1657 error.io.pciex.flt-ca-u@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 1658 error.io.pci.badreq-pw-d@PCIEXFNHZ/PCIFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 1659 error.io.pci.badreq-drw-d@PCIEXFNHZ/PCIFNHZ { is_under(PCIEXFN,PCIEXFNHZ) }; 1660 1661 prop error.io.pciex.flt-ur-u@PCIEXFN { !IS_LF(PCIEXFN) } (1)-> 1662 ereport.io.pciex.tl.ur@PCIEXFN; 1663 1664 prop error.io.pciex.flt-ur-u@PCIEXFN { IS_LF(PCIEXFN) } (0)-> 1665 ereport.io.pciex.tl.ur@PCIEXFN; 1666 1667 prop error.io.pciex.flt-ur-u@PCIEXFN (2)-> 1668 error.io.pci.target-ma-d@PCIEXFN, 1669 error.io.pciex.ur-u@PCIEXFN; 1670 1671 prop error.io.pciex.flt-ur-u@PCIEXFN (0)-> 1672 error.io.pciex.nonfatal@PCIEXFN; 1673 1674 prop error.io.pciex.ur-u@PCIEXFN/PCIEXFN (1)-> 1675 error.io.pciex.ur-u@PCIEXFN; 1676 1677 prop error.io.pciex.ur-u@pciexrc/PCIEXFN (0)-> 1678 ereport.io.pci.sec-ma@pciexrc; 1679 1680 /* 1681 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1682 * Stub unused legacy pci ereports at root complex. 1683 * Stub tl.uc as we can't do anything useful with it (we should eventually 1684 * get a cto which we can do something with - a uc without a cto is a genuinely 1685 * spurious completion which is at least harmless). 1686 * Stub messages that the root complex sends to itself. 1687 * Stub mce/mue/ce/nr/noadverr. 1688 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1689 */ 1690 1691 event error.io.pciex.discard_rc@pciexrc; 1692 1693 event ereport.io.pciex.noadverr@PCIEXFN{within(5s)}; 1694 event ereport.io.pciex.correctable@PCIEXFN{within(5s)}; 1695 event ereport.io.pciex.nonfatal@PCIEXFN{within(5s)}; 1696 event ereport.io.pciex.a-nonfatal@PCIEXFN{within(5s)}; 1697 event ereport.io.pciex.fatal@PCIEXFN{within(5s)}; 1698 event ereport.io.pci.nr@PCIEXFN{within(5s)}; 1699 event ereport.io.pci.nr@pciexrc{within(5s)}; 1700 event ereport.io.pci.ma@pciexrc{within(5s)}; 1701 event ereport.io.pci.rta@pciexrc{within(5s)}; 1702 event ereport.io.pci.sta@pciexrc{within(5s)}; 1703 event ereport.io.pci.dpe@pciexrc{within(5s)}; 1704 event ereport.io.pci.mdpe@pciexrc{within(5s)}; 1705 event ereport.io.pci.sserr@pciexrc{within(5s)}; 1706 event ereport.io.pciex.tl.uc@pciexrc{within(5s)}; 1707 event ereport.io.pciex.noadverr@pciexrc{within(5s)}; 1708 event ereport.io.pciex.a-nonfatal@pciexrc{within(5s)}; 1709 event ereport.io.pciex.rc.ce-msg@pciexrc{within(5s)}; 1710 event ereport.io.pciex.rc.mce-msg@pciexrc{within(5s)}; 1711 1712 event upset.io.pciex.discard_uc@PCIEXFN; 1713 event upset.io.pciex.discard@PCIEXFN; 1714 event upset.io.pciex.discard@pciexrc; 1715 1716 prop upset.io.pciex.discard_uc@PCIEXFN { IS_BG(PCIEXFN) } (1)-> 1717 ereport.io.pciex.tl.uc@PCIEXFN; 1718 1719 prop upset.io.pciex.discard_uc@PCIEXFN { IS_LF(PCIEXFN) } (1)-> 1720 ereport.io.pciex.tl.uc@PCIEXFN; 1721 1722 prop upset.io.pciex.discard@PCIEXFN (1)-> 1723 ereport.io.pci.nr@PCIEXFN, 1724 ereport.io.pciex.noadverr@PCIEXFN, 1725 ereport.io.pciex.correctable@PCIEXFN, 1726 ereport.io.pciex.nonfatal@PCIEXFN, 1727 ereport.io.pciex.a-nonfatal@PCIEXFN, 1728 ereport.io.pciex.fatal@PCIEXFN; 1729 1730 prop error.io.pciex.discard_rc@pciexrc (0)-> 1731 ereport.io.pciex.rc.mue-msg@pciexrc, 1732 ereport.io.pciex.rc.fe-msg@pciexrc { SOURCE_ID_MATCHES_OWN_BDF }, 1733 ereport.io.pciex.rc.nfe-msg@pciexrc { SOURCE_ID_MATCHES_OWN_BDF }; 1734 1735 prop upset.io.pciex.discard@pciexrc (1)-> 1736 error.io.pciex.discard_rc@pciexrc, 1737 ereport.io.pci.nr@pciexrc, 1738 ereport.io.pciex.noadverr@pciexrc, 1739 ereport.io.pciex.a-nonfatal@pciexrc, 1740 ereport.io.pciex.rc.ce-msg@pciexrc, 1741 ereport.io.pciex.rc.mce-msg@pciexrc, 1742 ereport.io.pciex.tl.uc@pciexrc, 1743 ereport.io.pci.ma@pciexrc, 1744 ereport.io.pci.rta@pciexrc, 1745 ereport.io.pci.sta@pciexrc, 1746 ereport.io.pci.dpe@pciexrc, 1747 ereport.io.pci.mdpe@pciexrc, 1748 ereport.io.pci.sserr@pciexrc; 1749 1750 /* 1751 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1752 * rules for propagations from child PCI bus 1753 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1754 */ 1755 1756 event error.io.pci.retry-to-u@PCIEXFN/PCIFN; 1757 event error.io.pci.ma-u@PCIEXFN/PCIFN; 1758 event error.io.pci.ta-u@PCIEXFN/PCIFN; 1759 event error.io.pci.ape-u@PCIEXFN/PCIFN; 1760 event error.io.pci.source-ape-u@PCIFN; 1761 event error.io.pci.target-ma-d@PCIFN; 1762 event error.io.pci.target-rta-d@PCIFN; 1763 event error.io.pci.badreq-pw-u@PCIEXFN/PCIFN; 1764 event error.io.pci.badreq-drw-u@PCIEXFN/PCIFN; 1765 event error.io.pci.source-perr-u@PCIFN; 1766 event error.io.pci.source-dpdata-u@PCIFN; 1767 event error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN; 1768 event error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN; 1769 event error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN; 1770 event error.io.pci.perr-pw-u@PCIEXFN/PCIFN; 1771 event error.io.pci.perr-dw-u@PCIEXFN/PCIFN; 1772 event error.io.pci.perr-dr-u@PCIEXFN/PCIFN; 1773 event error.io.pci.serr-u@PCIEXFN/PCIFN; 1774 event error.io.pcix.scpe-u@PCIEXFN/PCIFN; 1775 event error.io.pcix.source-scpe-u@PCIFN; 1776 event error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN; 1777 event error.io.pcix.spl-comp-ta-u@PCIEXFN/PCIFN; 1778 event error.io.pcix.spl-comp-ma-d@PCIEXFN/PCIFN; 1779 event error.io.pcix.spl-comp-ta-d@PCIEXFN/PCIFN; 1780 event error.io.pcix.uscmd@PCIEXFN; 1781 1782 event ereport.io.pcix.sec-spl-dis@PCIEXFN{within(5s)}; 1783 event ereport.io.pciex.bdg.uscmd@PCIEXFN{within(5s)}; 1784 event ereport.io.pciex.bdg.sec-perr@PCIEXFN{within(5s)}; 1785 event ereport.io.pciex.bdg.sec-uadr@PCIEXFN{within(5s)}; 1786 event ereport.io.pciex.bdg.sec-uat@PCIEXFN{within(5s)}; 1787 event ereport.io.pciex.bdg.sec-serr@PCIEXFN{within(5s)}; 1788 event ereport.io.pciex.bdg.sec-tex@PCIEXFN{within(5s)}; 1789 event ereport.io.pciex.bdg.sec-rma@PCIEXFN{within(5s)}; 1790 event ereport.io.pciex.bdg.sec-rta@PCIEXFN{within(5s)}; 1791 event ereport.io.pciex.bdg.sec-ma-sc@PCIEXFN{within(5s)}; 1792 event ereport.io.pciex.bdg.sec-ta-sc@PCIEXFN{within(5s)}; 1793 event ereport.io.pci.dto@PCIEXFN{within(5s)}; 1794 event ereport.io.pci.sec-rta@PCIEXFN{within(5s)}; 1795 event ereport.io.pci.sec-ma@PCIEXFN{within(5s)}; 1796 1797 /* 1798 * ma-u will only propagate on to pciex bus for non-posted accesses. It 1799 * is then represented as an unsupported request. 1800 */ 1801 prop error.io.pci.ma-u@PCIEXFN/PCIFN (0)-> 1802 ereport.io.pciex.tl.ur@PCIEXFN; 1803 1804 prop error.io.pci.ma-u@PCIEXFN/PCIFN { is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 1805 ereport.io.pci.sec-ma@pciexrc; 1806 1807 prop error.io.pci.ma-u@PCIEXFN/PCIFN (2)-> 1808 ereport.io.pci.sec-ma@PCIEXFN, 1809 error.io.pciex.nonfatal@PCIEXFN; 1810 1811 prop error.io.pci.target-ma-d@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1812 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1813 ereport.io.pciex.bdg.sec-rma@PCIEXFN; 1814 1815 /* 1816 * ta-u will only propagate on to pciex bus for non-posted accesses. It is 1817 * then represented as a completer abort. 1818 */ 1819 prop error.io.pci.ta-u@PCIEXFN/PCIFN (0)-> 1820 ereport.io.pci.sta@PCIEXFN, 1821 ereport.io.pciex.tl.ca@PCIEXFN; 1822 1823 prop error.io.pci.ta-u@PCIEXFN/PCIFN { is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 1824 ereport.io.pci.sec-rta@pciexrc; 1825 1826 prop error.io.pci.ta-u@PCIEXFN/PCIFN (2)-> 1827 ereport.io.pci.sec-rta@PCIEXFN, 1828 error.io.pciex.nonfatal@PCIEXFN; 1829 1830 prop error.io.pci.target-rta-d@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1831 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1832 ereport.io.pciex.bdg.sec-rta@PCIEXFN; 1833 1834 /* 1835 * PERR# on a delayed write is represented as an unsupported request 1836 */ 1837 prop error.io.pci.perr-dw-u@PCIEXFN/PCIFN (1)-> 1838 ereport.io.pci.sec-mdpe@PCIEXFN; 1839 1840 prop error.io.pci.perr-dw-u@PCIEXFN/PCIFN (0)-> 1841 error.io.pciex.flt-ur-u@PCIEXFN; 1842 1843 prop error.io.pci.perr-pw-u@PCIEXFN/PCIFN (1)-> 1844 ereport.io.pci.sec-mdpe@PCIEXFN; 1845 1846 prop error.io.pci.perr-pw-u@PCIEXFN/PCIFN (0)-> 1847 error.io.pciex.nonfatal@PCIEXFN; 1848 1849 prop error.io.pci.perr-dr-u@PCIEXFN/PCIFN (1)-> 1850 error.io.pciex.nonfatal@PCIEXFN; 1851 1852 prop error.io.pci.source-perr-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1853 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1854 ereport.io.pciex.bdg.sec-perr@PCIEXFN; 1855 1856 /* 1857 * If the bridge receives data with bad ecc/parity from pci/pci-x, it will 1858 * propagate onto pci express as a poisoned tlp 1859 */ 1860 prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (2)-> 1861 ereport.io.pci.sec-dpe@PCIEXFN, 1862 error.io.pciex.poiscomp-u@PCIEXFN; 1863 1864 prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (0)-> 1865 error.io.pciex.nonfatal@PCIEXFN; 1866 1867 prop error.io.pci.dpdata-dr-u@PCIEXFN/PCIFN (1)-> 1868 ereport.io.pci.sec-mdpe@PCIEXFN, 1869 ereport.io.pci.mdpe@PCIEXFN; 1870 1871 prop error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN (1)-> 1872 ereport.io.pci.sec-dpe@PCIEXFN; 1873 1874 prop error.io.pci.dpdata-dw-u@PCIEXFN/PCIFN (0)-> 1875 error.io.pciex.nonfatal@PCIEXFN, 1876 error.io.pciex.poisreq-u@PCIEXFN, 1877 ereport.io.pci.ma@PCIEXFN, 1878 ereport.io.pci.sec-sta@PCIEXFN, 1879 error.io.pci.ta-drw-d@PCIEXFN/PCIFN; 1880 1881 prop error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN (2)-> 1882 ereport.io.pci.sec-dpe@PCIEXFN, 1883 error.io.pciex.poisreq-u@PCIEXFN; 1884 1885 prop error.io.pci.dpdata-pw-u@PCIEXFN/PCIFN (0)-> 1886 error.io.pciex.nonfatal@PCIEXFN, 1887 ereport.io.pci.ma@PCIEXFN; 1888 1889 prop error.io.pci.source-dpdata-u@PCIFN { is_under(pciexrc, PCIFN) } (0)-> 1890 ereport.io.pciex.tl.ptlp@pciexrc, 1891 ereport.io.pciex.tl.ur@pciexrc; 1892 1893 prop error.io.pci.source-dpdata-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) 1894 && SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1895 ereport.io.pciex.bdg.sec-ude@PCIEXFN; 1896 1897 /* 1898 * If the bridge sees an address or attribute parity error it is considered 1899 * a fatal error. 1900 */ 1901 prop error.io.pci.ape-u@PCIEXFN/PCIFN (2)-> 1902 ereport.io.pci.sec-dpe@PCIEXFN, 1903 error.io.pciex.fatal@PCIEXFN; 1904 1905 prop error.io.pci.source-ape-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1906 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1907 ereport.io.pciex.bdg.sec-uat@PCIEXFN, 1908 ereport.io.pciex.bdg.sec-uadr@PCIEXFN; 1909 1910 prop error.io.pci.ape-u@PCIEXFN/PCIFN (0)-> 1911 ereport.io.pci.sec-rserr@PCIEXFN, 1912 ereport.io.pciex.bdg.sec-serr@PCIEXFN, 1913 ereport.io.pci.sec-sta@PCIEXFN; 1914 1915 /* 1916 * If the bridge sees a split completion error (pci-x only) it could 1917 * result in a number of things 1918 * - unrecovered split completion message data error (uscmd). This would 1919 * happen on a pio write. A completer abort is returned to the initiator. 1920 * - for various faults in the split completion (eg address parity error) 1921 * we will respond with a target abort (which the child device will treat 1922 * as a split completion ta) 1923 * - for other faults we can't tell who send the split completion and so 1924 * just drop the request (which the child device sees as a split 1925 * completion ma) 1926 */ 1927 prop error.io.pcix.scpe-u@PCIEXFN/PCIFN (0)-> 1928 ereport.io.pci.sec-dpe@PCIEXFN, 1929 ereport.io.pci.sec-rserr@PCIEXFN, 1930 ereport.io.pciex.bdg.sec-serr@PCIEXFN, 1931 ereport.io.pci.sec-sta@PCIEXFN, 1932 error.io.pciex.fatal@PCIEXFN; 1933 1934 prop error.io.pcix.source-scpe-u@PCIFN1 { IS_BG(PCIEXFN) && IS_PCI_LF(PCIFN1) && 1935 SOURCE_ID_MATCHES_BDF && is_under(PCIEXFN, PCIFN1) } (0)-> 1936 ereport.io.pciex.bdg.sec-uat@PCIEXFN, 1937 ereport.io.pciex.bdg.sec-uadr@PCIEXFN; 1938 1939 prop error.io.pcix.scpe-u@PCIEXFN/PCIFN (1)-> 1940 error.io.pcix.uscmd@PCIEXFN, 1941 error.io.pcix.spl-comp-ma-d@PCIEXFN/PCIFN, 1942 error.io.pcix.spl-comp-ta-d@PCIEXFN/PCIFN; 1943 1944 prop error.io.pcix.uscmd@PCIEXFN (4)-> 1945 error.io.pciex.fatal@PCIEXFN, 1946 ereport.io.pci.sta@PCIEXFN, 1947 ereport.io.pciex.tl.ca@PCIEXFN, 1948 ereport.io.pciex.bdg.uscmd@PCIEXFN; 1949 1950 prop error.io.pcix.uscmd@PCIEXFN { is_under(pciexrc, PCIEXFN) } (0)-> 1951 ereport.io.pci.sec-rta@pciexrc; 1952 1953 /* 1954 * Similarly a child device may have responded with a master abort or 1955 * target abort to one of our split competions. The hardware just logs these. 1956 */ 1957 prop error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN (3)-> 1958 error.io.pciex.nonfatal@PCIEXFN, 1959 ereport.io.pcix.sec-spl-dis@PCIEXFN, 1960 ereport.io.pciex.bdg.sec-ma-sc@PCIEXFN; 1961 1962 prop error.io.pcix.spl-comp-ma-u@PCIEXFN/PCIFN (0)-> 1963 ereport.io.pci.sec-ma@PCIEXFN; 1964 1965 prop error.io.pcix.spl-comp-ta-u@PCIEXFN/PCIFN (4)-> 1966 error.io.pciex.nonfatal@PCIEXFN, 1967 ereport.io.pcix.sec-spl-dis@PCIEXFN, 1968 ereport.io.pciex.bdg.sec-ta-sc@PCIEXFN, 1969 ereport.io.pci.sec-rta@PCIEXFN; 1970 1971 /* 1972 * SERR# is considered fatal 1973 */ 1974 prop error.io.pci.serr-u@PCIEXFN/PCIFN (3)-> 1975 error.io.pciex.fatal@PCIEXFN, 1976 ereport.io.pci.sec-rserr@PCIEXFN, 1977 ereport.io.pciex.bdg.sec-serr@PCIEXFN; 1978 1979 /* 1980 * Retry time-out is nonfatal. The initial requester has stopped retrying so 1981 * there's nothing else the hardware can do but flag the error. 1982 */ 1983 prop error.io.pci.retry-to-u@PCIEXFN/PCIFN (2)-> 1984 error.io.pciex.nonfatal@PCIEXFN, 1985 ereport.io.pciex.bdg.sec-tex@PCIEXFN; 1986 1987 prop error.io.pci.retry-to-u@PCIEXFN/PCIFN (0)-> 1988 ereport.io.pci.sta@PCIEXFN, 1989 ereport.io.pci.dto@PCIEXFN; 1990 1991 prop error.io.pci.retry-to-u@PCIEXFN/PCIFN { 1992 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 1993 ereport.io.pci.sec-rta@pciexrc; 1994 1995 /* 1996 * A bad dma request (eg with invalid address) propagates onto pci express 1997 * as a bad dma request. The end result may be a master abort or target abort 1998 * (depending on whether the child is pci-x or pci). 1999 */ 2000 prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN (0)-> 2001 ereport.io.pci.ma@PCIEXFN, 2002 ereport.io.pci.rta@PCIEXFN, 2003 ereport.io.pci.sec-sta@PCIEXFN; 2004 2005 prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN { 2006 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 2007 ereport.io.pciex.tl.ur@pciexrc, 2008 ereport.io.pciex.tl.ca@pciexrc, 2009 ereport.io.pci.sec-sta@pciexrc; 2010 2011 prop error.io.pci.badreq-pw-u@PCIEXFN/PCIFN { IS_SD(PCIEXFN1) && 2012 is_under(PCIEXFN1, PCIEXFN/PCIFN) } (0)-> 2013 ereport.io.pciex.tl.ur@PCIEXFN1, 2014 ereport.io.pciex.tl.ca@PCIEXFN1, 2015 ereport.io.pci.sec-sta@PCIEXFN1, 2016 error.io.pciex.nonfatal@PCIEXFN1; 2017 2018 prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN (0)-> 2019 ereport.io.pci.ma@PCIEXFN, 2020 ereport.io.pci.rta@PCIEXFN, 2021 ereport.io.pci.sec-sta@PCIEXFN; 2022 2023 prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN { 2024 is_under(pciexrc, PCIEXFN/PCIFN) } (0)-> 2025 ereport.io.pciex.tl.ur@pciexrc, 2026 ereport.io.pciex.tl.ca@pciexrc, 2027 ereport.io.pci.sec-sta@pciexrc; 2028 2029 prop error.io.pci.badreq-drw-u@PCIEXFN/PCIFN { IS_SD(PCIEXFN1) && 2030 is_under(PCIEXFN1, PCIEXFN/PCIFN) } (0)-> 2031 ereport.io.pciex.tl.ur@PCIEXFN1, 2032 ereport.io.pciex.tl.ca@PCIEXFN1, 2033 ereport.io.pci.sec-sta@PCIEXFN1, 2034 error.io.pciex.nonfatal@PCIEXFN1; 2035 2036 /* 2037 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2038 * target- propagations 2039 * 2040 * A Root Complex driver may generate "target-" ereports when knowledge of the 2041 * physical address associated with a fault allows the target device to be 2042 * determined. This is not a requirement of the Diagnosis Engine, but can be 2043 * valuable when available. 2044 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2045 */ 2046 event error.io.pci.target-ma-d@PCIEXFN/PCIFN; 2047 event error.io.pci.target-rta-d@PCIEXFN/PCIFN; 2048 event ereport.io.pci.target-rta@PCIEXFN{within(5s)}; 2049 event ereport.io.pci.target-ma@PCIEXFN{within(5s)}; 2050 2051 prop error.io.pci.target-ma-d@PCIEXFN (0)-> 2052 ereport.io.pci.target-ma@PCIEXFN, 2053 ereport.io.pci.target-ma@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 2054 error.io.pci.target-ma-d@PCIEXFNHZ/PCIFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }; 2055 2056 prop error.io.pci.target-rta-d@PCIEXFN (0)-> 2057 ereport.io.pci.target-rta@PCIEXFN, 2058 ereport.io.pci.target-rta@PCIEXFNHZ { is_under(PCIEXFN, PCIEXFNHZ) }, 2059 error.io.pci.target-rta-d@PCIEXFNHZ/PCIFNHZ { is_under(PCIEXFN,PCIEXFNHZ) }; 2060 2061 /* 2062 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2063 * stub unused pciex-pci bridge ereports 2064 * - ignore usc/sec-unex-spl 2065 * - ignore sec-spl-or/sec-spl-dly as these aren't really faults (tuning info) 2066 * - ignore ecc.ue ereports (we get everything we need from dpe/mdpe) 2067 * - ignore ecc.ce ereports for now (could do serd on these) 2068 * +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2069 */ 2070 2071 event ereport.io.pciex.bdg.usc@PCIEXFN{within(5s)}; 2072 event ereport.io.pcix.sec-unex-spl@PCIEXFN{within(5s)}; 2073 event ereport.io.pcix.sec-spl-or@PCIEXFN{within(5s)}; 2074 event ereport.io.pcix.sec-spl-dly@PCIEXFN{within(5s)}; 2075 event ereport.io.pcix.sec-ecc.ce-addr@PCIEXFN{within(5s)}; 2076 event ereport.io.pcix.sec-ecc.ce-attr@PCIEXFN{within(5s)}; 2077 event ereport.io.pcix.sec-ecc.ce-data@PCIEXFN{within(5s)}; 2078 event ereport.io.pcix.sec-ecc.ue-addr@PCIEXFN{within(5s)}; 2079 event ereport.io.pcix.sec-ecc.ue-attr@PCIEXFN{within(5s)}; 2080 event ereport.io.pcix.sec-ecc.ue-data@PCIEXFN{within(5s)}; 2081 event ereport.io.pcix.sec-s-ce@PCIEXFN{within(5s)}; 2082 event ereport.io.pcix.sec-s-ue@PCIEXFN{within(5s)}; 2083 2084 event upset.io.pciex.discard-bdg@PCIEXFN; 2085 2086 prop upset.io.pciex.discard-bdg@PCIEXFN (1)-> 2087 ereport.io.pciex.bdg.usc@PCIEXFN, 2088 ereport.io.pcix.sec-unex-spl@PCIEXFN, 2089 ereport.io.pcix.sec-spl-or@PCIEXFN, 2090 ereport.io.pcix.sec-spl-dly@PCIEXFN, 2091 ereport.io.pcix.sec-ecc.ce-addr@PCIEXFN, 2092 ereport.io.pcix.sec-ecc.ce-attr@PCIEXFN, 2093 ereport.io.pcix.sec-ecc.ce-data@PCIEXFN, 2094 ereport.io.pcix.sec-ecc.ue-addr@PCIEXFN, 2095 ereport.io.pcix.sec-ecc.ue-attr@PCIEXFN, 2096 ereport.io.pcix.sec-ecc.ue-data@PCIEXFN, 2097 ereport.io.pcix.sec-s-ce@PCIEXFN, 2098 ereport.io.pcix.sec-s-ue@PCIEXFN; 2099
Indexes created Sun Nov 22 02:52:53 UTC 2009
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