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  /onnv/onnv-gate/usr/src/cmd/fm/eversholt/files/i386/i86pc/
gcpu_amd.esc 69 * SERD paramters for individual page faults. When more than PAGE_SB_COUNT
109 * | associated with a per-CSPATH SERD engine as long as we are |
116 * | When the per-CSPATH SERD engine fires we fault the page |
132 engine serd.memory.generic-x86.page_ce@CSPATH, N=PAGE_SB_COUNT, T=PAGE_SB_TIME;
136 engine=serd.memory.generic-x86.page_ce@CSPATH;
137 engine serd.memory.generic-x86.dimm_ce@CSPATH, N=PAGE_SB_COUNT, T=PAGE_SB_TIME;
139 engine=serd.memory.generic-x86.dimm_ce@CSPATH;
gcpu.esc 58 * by N+1, otherwise we declare a fault when the SERD engine trips.
63 engine serd.cpu.generic-x86.simple@chip/core/strand, N=SMPL_N, T=72h;
65 engine=serd.cpu.generic-x86.simple@chip/core/strand;
146 * error by incrementing the serd engine by n + 1.
150 engine serd.cpu.generic-x86.fltleaf@chip/core/strand, N=n, T=t; \
152 engine=serd.cpu.generic-x86.fltleaf@chip/core/strand; \
161 engine serd.cpu.generic-x86.fltleaf@chip/core/strand, N=n, T=t; \
163 response=0, engine=serd.cpu.generic-x86.fltleaf@chip/core/strand;\
amd64.esc 104 * Single-bit errors are fed into a per-rank SERD engine; if a SERD engine
111 * single-bit errors, but via separate serd engines to allow distinct
129 * SERD engines which diagnose fault.memory.page_sb if they trip.
132 * into additional per-rank SERD engines which diagnose fault.memory.page_ck
147 engine serd.memory.page_sb@chip/memory-controller/dimm/rank,
149 engine serd.memory.page_ck@chip/memory-controller/dimm/rank,
151 engine serd.memory.dimm_sb@chip/memory-controller/dimm/rank,
153 engine serd.memory.dimm_ck@chip/memory-controller/dimm/rank,
157 engine=serd.memory.page_sb@chip/memory-controller/dimm/rank
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intel.esc 52 * we diagnose it to an upset and decalre a fault when the SERD engine
57 engine serd.cpu.intel.simple@chip/core/strand, N=3, T=72h;
59 engine=serd.cpu.intel.simple@chip/core/strand;
139 engine serd.cpu.intel.fltleaf@chip/core/strand, N=n, T=t; \
141 engine=serd.cpu.intel.fltleaf@chip/core/strand; \
151 engine serd.cpu.intel.fltleaf@chip/core/strand, N=n, T=t; \
153 engine=serd.cpu.intel.fltleaf@chip/core/strand; \
272 engine serd.memory.intel.page_ce@MBDIMM/rank, N=PAGE_CE_COUNT, T=PAGE_CE_TIME;
274 count=stat.ce_pgflt@MBDIMM, engine=serd.memory.intel.page_ce@MBDIMM/rank;
281 engine serd.memory.intel.dimm_ce@MBDIMM/rank, N=DIMM_CE_COUNT, T=DIMM_CE_TIME
    [all...]
  /onnv/onnv-gate/usr/src/cmd/fm/eversholt/files/sparc/SUNW,Sun-Fire-15000/
SUNW,Sun-Fire-15000.esc 61 engine serd.io.cpu.ecc@cpu,
66 engine=serd.io.cpu.ecc@cpu;
  /onnv/onnv-gate/usr/src/cmd/fm/eversholt/files/sparc/sun4v/
gmem.esc 107 engine serd.memory.generic-sparc.membuf-crc@CHIP, N=120, T=30min;
108 engine serd.memory.generic-sparc.membuf-crc@MEM_BUFF, N=120, T=30min;
109 engine serd.memory.generic-sparc.membuf-crc@MEM_CTRL, N=120, T=30min;
113 engine=serd.memory.generic-sparc.membuf-crc@CHIP;
115 engine=serd.memory.generic-sparc.membuf-crc@MEM_BUFF;
117 engine=serd.memory.generic-sparc.membuf-crc@MEM_CTRL;
gcpu.esc 60 * For CE errors, the errors are put through a SERD engine. If
61 * the SERD engine trips, the fault is produced. SERD engine
63 * serd.cpu.generic-sparc.<resource><suffix>
64 * Ex: serd.cpu.generic-sparc.chipitlb
65 * SERD N/T values are set to default values, but can be
67 * order or precedence of the SERD N/T values is:
73 * The increment rate of the SERD engines can also be
229 * Errors are serded and fault is generated when the SERD engine trips
230 * The serd name & the N & T values are set at the running time
    [all...]
zambezi.esc 75 * SERD values used by the LFU subsystem
332 * SERD engines (4 interconnects, and 4 CHIPs).
335 * automatically. Instead, we explicitly declare 4 sets of serd engine
351 * CHIP0 SERD rules
353 * These rules create a SERD engine for the connection between each
356 engine serd.asic.ultraSPARC-T2plus.interconnect.lfu.chip0@interconnect,
361 engine=serd.asic.ultraSPARC-T2plus.interconnect.lfu.chip0@interconnect;
364 engine=serd.asic.ultraSPARC-T2plus.interconnect.lfu.chip0@interconnect;
376 * CHIP1 SERD rules
378 * These rules create a SERD engine for the connection between eac
    [all...]
n2piu.esc 258 engine serd.io.device.nonfatal@niu/niufn,
263 engine=serd.io.device.nonfatal@niu/niufn;
  /onnv/onnv-gate/usr/src/cmd/fm/eversholt/files/sparc/sun4u/
oberon.esc 145 engine serd.io.oberon.nodiag@hostbridge,
150 engine=serd.io.oberon.nodiag@hostbridge;
psycho.esc 57 * - ecc: the SERD engine to gather enough PIO CEs to generate an ereport.
64 engine serd.io.psycho.ecc@hostbridge,
69 engine=serd.io.psycho.ecc@hostbridge;
94 * - ecc: the SERD engine to gather enough PIO CEs to generate an ereport.
113 * - ecc: the SERD engine for the CPU to fire due to PIO CEs from this
243 engine serd.io.psy.nodiag@hostbridge,
248 engine=serd.io.psy.nodiag@hostbridge;
schizo.esc 123 engine serd.io.schizo.ecc@hostbridge,
128 engine=serd.io.schizo.ecc@hostbridge;
425 engine serd.io.sch.nodiag@hostbridge,
430 engine=serd.io.sch.nodiag@hostbridge;
xmits.esc 147 engine serd.io.xmits.ecc@hostbridge,
152 engine=serd.io.xmits.ecc@hostbridge;
433 engine serd.io.xmits.nodiag@hostbridge,
438 engine=serd.io.xmits.nodiag@hostbridge;
tomatillo.esc 396 engine serd.io.tom.nodiag@hostbridge,
401 engine=serd.io.tom.nodiag@hostbridge;
  /onnv/onnv-gate/usr/src/cmd/fm/eversholt/common/
tree.c 80 SERDcount = stats_new_counter("parser.SERD", "SERD engine decls", 1);
1062 struct node *serd; local
1066 serd = tree_s2np_lut_lookup(((struct node *)rhs)->u.stmt.lutp,
1068 if (serd == NULL)
1071 ASSERT(serd->t == T_EVENT);
1072 if (arg != NULL && tree_eventcmp(serd, (struct node *)arg) != 0)
1075 serd = tree_event2np_lut_lookup(SERDs, serd);
1076 if (serd != NULL
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literals.h 71 L_DECL(serd); variable
  /onnv/onnv-gate/usr/src/cmd/fm/eversholt/files/common/
disk.esc 40 * SERD engine for media error fault propagation:
50 engine serd.io.scsi.cmd.disk.dev.rqs.merr@P, N=1, T=24h;
57 engine=serd.io.scsi.cmd.disk.dev.rqs.merr@P;
117 * the serd engine would only trigger if the fault recurred on the same LBA
pciex.esc 48 * SERD parameters.
57 * we have tighter serd parameters for these. These are most likely errors in
120 engine serd.io.pciex.flt-nf@PCIEXFN, N=NONFATAL_DPE_COUNT, T=NONFATAL_DPE_TIME;
122 engine=serd.io.pciex.flt-nf@PCIEXFN;
124 engine serd.io.device.nonfatal@PCIEXFN, N=CORRLINK_COUNT, T=CORRLINK_TIME;
126 engine=serd.io.device.nonfatal@PCIEXFN;
127 engine serd.io.device.nonfatal@PCIEXFN/PCIEXFN,
130 engine=serd.io.device.nonfatal@PCIEXFN/PCIEXFN;
131 engine serd.io.device.nonfatal@pciexrc/PCIEXFN,
134 engine=serd.io.device.nonfatal@pciexrc/PCIEXFN
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pci.esc 34 * SERD parameters.
38 * serd parameters for these. These are most likely errors in buffers/caches
53 engine serd.io.device.nonfatal@PCIFN,
56 engine serd.io.pci.nf-dpe@PCIFN,
59 engine serd.io.pci.nf-dpe-bus@pcibus,
86 engine=serd.io.device.nonfatal@PCIFN, FITrate=PCI_DEV_FIT;
89 engine=serd.io.pci.nf-dpe@PCIFN, FITrate=PCI_DEV_FIT;
515 engine=serd.io.pci.nf-dpe-bus@pcibus, FITrate=PCI_BUS_FIT;
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  /onnv/onnv-gate/usr/src/cmd/fm/eversholt/files/sparc/sun4/
fire.esc 547 engine serd.io.fire.link-events@hostbridge/pciexrc,
552 engine=serd.io.fire.link-events@hostbridge/pciexrc ;
633 /* SERD CEs */
639 engine=serd.io.fire.fabric@pciexbus/pciexdev/pciexfn;
641 engine serd.io.fire.fabric@pciexbus/pciexdev/pciexfn,

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