| /onnv/onnv-gate/usr/src/lib/libc/sparc/gen/ |
| getctxt.c | 42 greg_t *reg; local
55 reg = ucp->uc_mcontext.gregs;
56 reg[REG_SP] = getfp();
57 reg[REG_O7] = caller();
58 reg[REG_PC] = reg[REG_O7] + 8;
59 reg[REG_nPC] = reg[REG_PC] + 4;
60 reg[REG_O0] = 0;
|
| swapctxt.c | 42 greg_t *reg; local
54 reg = oucp->uc_mcontext.gregs;
55 reg[REG_SP] = getfp();
56 reg[REG_O7] = caller();
57 reg[REG_PC] = reg[REG_O7] + 8;
58 reg[REG_nPC] = reg[REG_PC] + 4;
59 reg[REG_O0] = 0;
|
| /onnv/onnv-gate/usr/src/lib/libc/sparcv9/gen/ |
| getctxt.c | 42 greg_t *reg; local
55 reg = ucp->uc_mcontext.gregs;
56 reg[REG_SP] = getfp();
57 reg[REG_O7] = caller();
58 reg[REG_PC] = reg[REG_O7] + 8;
59 reg[REG_nPC] = reg[REG_PC] + 4;
60 reg[REG_O0] = 0;
|
| swapctxt.c | 42 greg_t *reg; local
54 reg = oucp->uc_mcontext.gregs;
55 reg[REG_SP] = getfp();
56 reg[REG_O7] = caller();
57 reg[REG_PC] = reg[REG_O7] + 8;
58 reg[REG_nPC] = reg[REG_PC] + 4;
59 reg[REG_O0] = 0;
|
| /onnv/onnv-gate/usr/src/lib/libast/common/sfio/ |
| _sfputc.c | 27 int sfputc(reg Sfio_t* f, reg int c)
30 reg Sfio_t* f;
31 reg int c;
|
| _sfclrerr.c | 27 int sfclrerr(reg Sfio_t* f)
30 reg Sfio_t* f;
|
| _sfdlen.c | 27 int sfdlen(reg Sfdouble_t v)
30 reg Sfdouble_t v;
|
| _sfeof.c | 27 int sfeof(reg Sfio_t* f)
30 reg Sfio_t* f;
|
| _sferror.c | 27 int sferror(reg Sfio_t* f)
30 reg Sfio_t* f;
|
| _sffileno.c | 27 int sffileno(reg Sfio_t* f)
30 reg Sfio_t* f;
|
| _sfgetc.c | 27 int sfgetc(reg Sfio_t* f)
30 reg Sfio_t* f;
|
| _sfllen.c | 27 int sfllen(reg Sflong_t v)
30 reg Sflong_t v;
|
| _sfstacked.c | 27 int sfstacked(reg Sfio_t* f)
30 reg Sfio_t* f;
|
| _sfulen.c | 27 int sfulen(reg Sfulong_t v)
30 reg Sfulong_t v;
|
| _sfvalue.c | 27 ssize_t sfvalue(reg Sfio_t* f)
30 reg Sfio_t* f;
|
| sfputd.c | 27 int sfputd(reg Sfio_t* f, Sfdouble_t d)
30 reg Sfio_t* f;
31 reg Sfdouble_t d;
|
| sfputl.c | 27 int sfputl(reg Sfio_t* f, Sflong_t l)
30 reg Sfio_t* f;
31 reg Sflong_t l;
|
| sfputu.c | 27 int sfputu(reg Sfio_t* f, Sfulong_t u)
30 reg Sfio_t* f;
31 reg Sfulong_t u;
|
| /onnv/onnv-gate/usr/src/uts/intel/io/intel_nhm/ |
| intel_nhm.h | 62 #define MC_SCRUB_CONTROL_WR(cpu, reg) nhm_pci_putl(SOCKET_BUS(cpu), 3, 2, \
63 0x4c, reg);
65 #define MC_SSR_CONTROL_WR(cpu, reg) nhm_pci_putl(SOCKET_BUS(cpu), 3, 2, 0x48, \
66 reg);
102 #define MC_CONTROL_CHANNEL_ACTIVE(reg, channel) \
103 ((reg) & (1 << (8 + (channel))) != 0)
104 #define MC_CONTROL_ECCEN(reg) (((reg) >> 1) & 1)
105 #define MC_CONTROL_CLOSED_PAGE(reg) ((reg) & 1
[all...] |
| /onnv/onnv-gate/usr/src/uts/i86pc/io/xsvc/ |
| xsvc.conf | 30 # The reg property defines the physical range that the xsvc driver can
33 name="xsvc" class="root" reg=0x0,0,0xffffffff;
|
| /onnv/onnv-gate/usr/src/uts/common/sys/ |
| vgasubr.h | 42 extern int vga_get_reg(struct vgaregmap *reg, int i);
43 extern void vga_set_reg(struct vgaregmap *reg, int i, int v);
44 extern int vga_get_crtc(struct vgaregmap *reg, int i);
45 extern void vga_set_crtc(struct vgaregmap *reg, int i, int v);
46 extern int vga_get_seq(struct vgaregmap *reg, int i);
47 extern void vga_set_seq(struct vgaregmap *reg, int i, int v);
48 extern int vga_get_grc(struct vgaregmap *reg, int i);
49 extern void vga_set_grc(struct vgaregmap *reg, int i, int v);
50 extern int vga_get_atr(struct vgaregmap *reg, int i);
51 extern void vga_set_atr(struct vgaregmap *reg, int i, int v)
[all...] |
| /onnv/onnv-gate/usr/src/uts/intel/sys/ |
| reg.h | 34 #include <ia32/sys/reg.h>
|
| pci_cfgspace.h | 45 extern uint8_t (*pci_getb_func)(int bus, int dev, int func, int reg);
46 extern uint16_t (*pci_getw_func)(int bus, int dev, int func, int reg);
47 extern uint32_t (*pci_getl_func)(int bus, int dev, int func, int reg);
48 extern void (*pci_putb_func)(int bus, int dev, int func, int reg, uint8_t val);
49 extern void (*pci_putw_func)(int bus, int dev, int func, int reg, uint16_t val);
50 extern void (*pci_putl_func)(int bus, int dev, int func, int reg, uint32_t val);
|
| /onnv/onnv-gate/usr/src/uts/common/io/ixgbe/ |
| ixgbe_osdep.c | 33 ixgbe_read_pci_cfg(struct ixgbe_hw *hw, uint32_t reg)
35 return (pci_config_get16(OS_DEP(hw)->cfg_handle, reg));
39 ixgbe_write_pci_cfg(struct ixgbe_hw *hw, uint32_t reg, uint32_t val)
41 pci_config_put16(OS_DEP(hw)->cfg_handle, reg, val);
|
| /onnv/onnv-gate/usr/src/uts/sun/io/ |
| zs.conf | 28 reg=0x210,0xf1000000,0x4 interrupts=12;
31 reg=0x210,0xf0000000,0x4 interrupts=12;
36 reg=0x210,0xe0000004,0x4 interrupts=12;
|
