| /onnv/onnv-gate/usr/src/lib/libc/sparc/gen/ |
| getctxt.c | 42 greg_t *reg; local
55 reg = ucp->uc_mcontext.gregs;
56 reg[REG_SP] = getfp();
57 reg[REG_O7] = caller();
58 reg[REG_PC] = reg[REG_O7] + 8;
59 reg[REG_nPC] = reg[REG_PC] + 4;
60 reg[REG_O0] = 0;
|
| swapctxt.c | 42 greg_t *reg; local
54 reg = oucp->uc_mcontext.gregs;
55 reg[REG_SP] = getfp();
56 reg[REG_O7] = caller();
57 reg[REG_PC] = reg[REG_O7] + 8;
58 reg[REG_nPC] = reg[REG_PC] + 4;
59 reg[REG_O0] = 0;
|
| siglongjmp.c | 49 greg_t *reg = uc.uc_mcontext.gregs; local
64 _fetch_globals(®[REG_G1]);
67 reg[REG_PC] = bp->sjs_pc;
68 reg[REG_nPC] = reg[REG_PC] + 0x4;
69 reg[REG_SP] = bp->sjs_sp;
77 reg[REG_O0] = (greg_t)val;
79 reg[REG_O0] = (greg_t)1;
|
| makectxt.c | 57 greg_t *reg; local
64 reg = ucp->uc_mcontext.gregs;
65 reg[REG_PC] = (greg_t)func;
66 reg[REG_nPC] = reg[REG_PC] + 0x4;
96 *tsp++ = reg[REG_O0 + argno] = va_arg(ap, long);
103 reg[REG_SP] = (greg_t)sp - STACK_BIAS; /* sp (when done) */
104 reg[REG_O7] = (greg_t)resumecontext - 8; /* return pc */
110 greg_t *reg; local
117 reg = ucp->uc_mcontext.gregs
[all...] |
| /onnv/onnv-gate/usr/src/lib/libc/sparcv9/gen/ |
| getctxt.c | 42 greg_t *reg; local
55 reg = ucp->uc_mcontext.gregs;
56 reg[REG_SP] = getfp();
57 reg[REG_O7] = caller();
58 reg[REG_PC] = reg[REG_O7] + 8;
59 reg[REG_nPC] = reg[REG_PC] + 4;
60 reg[REG_O0] = 0;
|
| swapctxt.c | 42 greg_t *reg; local
54 reg = oucp->uc_mcontext.gregs;
55 reg[REG_SP] = getfp();
56 reg[REG_O7] = caller();
57 reg[REG_PC] = reg[REG_O7] + 8;
58 reg[REG_nPC] = reg[REG_PC] + 4;
59 reg[REG_O0] = 0;
|
| siglongjmp.c | 49 greg_t *reg = uc.uc_mcontext.gregs; local
64 _fetch_globals(®[REG_G1]);
67 reg[REG_PC] = bp->sjs_pc;
68 reg[REG_nPC] = reg[REG_PC] + 0x4;
69 reg[REG_SP] = bp->sjs_sp;
77 reg[REG_O0] = (greg_t)val;
79 reg[REG_O0] = (greg_t)1;
|
| makectxt.c | 57 greg_t *reg; local
64 reg = ucp->uc_mcontext.gregs;
65 reg[REG_PC] = (greg_t)func;
66 reg[REG_nPC] = reg[REG_PC] + 0x4;
96 *tsp++ = reg[REG_O0 + argno] = va_arg(ap, long);
103 reg[REG_SP] = (greg_t)sp - STACK_BIAS; /* sp (when done) */
104 reg[REG_O7] = (greg_t)resumecontext - 8; /* return pc */
110 greg_t *reg; local
117 reg = ucp->uc_mcontext.gregs
[all...] |
| /onnv/onnv-gate/usr/src/lib/libast/common/comp/ |
| fnmatch.c | 36 int reg; /* regex flag */ member in struct:__anon26
62 reflags |= mp->reg;
|
| /onnv/onnv-gate/usr/src/cmd/basename/ |
| basename.c | 50 regex_t reg; local
143 r = regcomp(®, suf_pat, 0);
150 r = regexec(®, string, 2, pmatch, 0);
|
| /onnv/onnv-gate/usr/src/cmd/fps/fptest/ |
| cheetah_sdc.c | 55 char *reg; member in struct:__anon513
116 "Test:%d, reg:%s", iter,
117 reg_func[regs].reg);
|
| /onnv/onnv-gate/usr/src/cmd/vgrind/ |
| retest.c | 23 char reg[132]; local
32 scanf ("%s", reg);
33 ireg = convexp(reg);
|
| /onnv/onnv-gate/usr/src/lib/libdtrace/common/ |
| dt_regset.c | 87 int reg; local
91 reg = (int)((wx << BT_ULSHIFT) | bx);
92 BT_SET(drp->dr_bitmap, reg);
93 return (reg);
102 dt_regset_free(dt_regset_t *drp, int reg)
104 assert(reg > 0 && reg < drp->dr_size);
105 assert(BT_TEST(drp->dr_bitmap, reg) != 0);
106 BT_CLEAR(drp->dr_bitmap, reg);
|
| /onnv/onnv-gate/usr/src/uts/intel/io/intel_nhm/ |
| nhm_pci_cfg.c | 45 pci_regspec_t reg; local
48 reg.pci_phys_mid = 0;
49 reg.pci_phys_low = 0;
50 reg.pci_size_hi = 0;
51 reg.pci_size_low = PCIE_CONF_HDR_SIZE; /* overriden in pciex */
55 reg.pci_phys_hi = ((SOCKET_BUS(i))
60 DDI_MAJOR_T_UNKNOWN, dip, "reg",
61 (int *)®, sizeof (reg)/sizeof (int)) !=
64 "cannot create reg property")
[all...] |
| /onnv/onnv-gate/usr/src/uts/common/io/dmfe/ |
| dmfe_log.c | 73 uint32_t reg; local
89 reg = dmfe_chip_get32(dmfep, 8*i);
90 cmn_err(CE_NOTE, "!%s: CR%d\t%08x", dmfep->ifname, i, reg);
|
| /onnv/onnv-gate/usr/src/uts/common/io/e1000g/ |
| e1000_osdep.c | 46 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
48 pci_config_put16(OS_DEP(hw)->cfg_handle, reg, *value);
52 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
55 pci_config_get16(OS_DEP(hw)->cfg_handle, reg);
69 uint16_t reg; /* register contents */ local
91 (void) e1000_read_phy_reg(hw, offset, ®);
94 reg |= spd_bit; /* enable: set the spd bit */
96 reg &= ~spd_bit; /* disable: clear the spd bit */
98 (void) e1000_write_phy_reg(hw, offset, reg);
103 * config space at offset reg into the capability space
[all...] |
| /onnv/onnv-gate/usr/src/uts/intel/io/intel_nb5000/ |
| nb_pci_cfg.c | 49 pci_regspec_t reg; local
52 reg.pci_phys_hi = 16 << PCI_REG_DEV_SHIFT; /* Bus=0, Dev=16, Func=0 */
53 reg.pci_phys_mid = 0;
54 reg.pci_phys_low = 0;
55 reg.pci_size_hi = 0;
56 reg.pci_size_low = PCIE_CONF_HDR_SIZE; /* overriden in pciex */
59 if (ddi_prop_update_int_array(DDI_MAJOR_T_UNKNOWN, dip, "reg",
60 (int *)®, sizeof (reg)/sizeof (int)) != DDI_PROP_SUCCESS)
62 "nb_pci_cfg_setup: cannot create reg property")
[all...] |
| /onnv/onnv-gate/usr/src/cmd/mdb/i86pc/modules/pcplusmp/ |
| apic.c | 102 ioapic_read(int ioapic_ix, uint32_t reg)
107 ioapic[APIC_IO_REG] = reg;
119 int reg; local
152 mdb_printf("%4s %8s %8s\n", "reg", "high", " low");
153 for (reg = 0; reg <= reg_max; reg++) {
156 high = READ_IOAPIC_RDT_ENTRY_HIGH_DWORD(i, reg);
157 low = READ_IOAPIC_RDT_ENTRY_LOW_DWORD(i, reg);
159 mdb_printf("%2d %8x %8x\n", reg, high, low)
[all...] |
| /onnv/onnv-gate/usr/src/lib/libslp/javalib/com/sun/slp/ |
| SARequester.java | 248 // Create a reg to use for refreshing if the URL was permanently
261 pregtable.reg(URL, srvReg);
|
| /onnv/onnv-gate/usr/src/uts/common/syscall/ |
| lseek.c | 85 int reg; local
88 reg = (vp->v_type == VREG);
95 if (reg && noff > max) {
102 if (reg && off > (max - curoff)) {
107 if (reg && noff > max) {
118 if (reg && (off > (max - (offset_t)vattr.va_size))) {
123 if (reg && noff > max) {
151 if (reg && (noff > max))
182 if (reg && (noff > max))
194 ASSERT((reg && noff <= max) || !reg)
[all...] |
| /onnv/onnv-gate/usr/src/uts/sun4u/io/ |
| iocache.c | 95 DPRINTF(IOCACHE_REGISTERS_DEBUG, ("Streaming buffer control reg: 0x%p, "
96 "Streaming buffer flush reg: 0x%p, Streaming buffer sync reg: 0x%p",
100 /* Initialize stream buffer sync reg mutex */
186 uint64_t reg; local
194 /* Read the page tag diag reg */
195 reg = *reg_addr;
199 hi = (uint_t)(reg >> 32);
200 lo = (uint_t)(reg & 0xffffffff);
203 "reg addr 0x%p, hi0x%x lo0x%x\n"
[all...] |
| /onnv/onnv-gate/usr/src/uts/sun4u/io/pci/ |
| pci_cb.c | 96 uint64_t reg, pa; local
109 reg = ib_get_map_reg(mondo, cpu_id);
110 stdphysio(pa, reg);
121 DEBUG2(DBG_CB|DBG_CONT, NULL, "\tPA=%016llx data=%016llx\n", pa, reg);
|
| /onnv/onnv-gate/usr/src/uts/common/io/ixgbe/ |
| ixgbe_debug.c | 44 uint32_t ivar, reg; local
111 if (reg = IXGBE_READ_REG(hw, IXGBE_RAL(i))) {
113 i, reg, i, IXGBE_READ_REG(hw, IXGBE_RAH(i)));
120 if (reg = IXGBE_READ_REG(hw, IXGBE_MTA(i))) {
121 ixgbe_log(ixgbe, "mta(%d): 0x%x\n", i, reg);
130 if (reg = IXGBE_READ_REG(hw, off)) {
131 ixgbe_log(ixgbe, "vfta(0x%x): 0x%x\n", off, reg);
140 if (reg = IXGBE_READ_REG(hw, IXGBE_MDEF(i))) {
141 ixgbe_log(ixgbe, "mdef(%d): 0x%x\n", i, reg);
458 /* Dump RX related reg's *
[all...] |
| /onnv/onnv-gate/usr/src/uts/sun/io/audio/drv/audiocs/ |
| audio_4231_eb2dma.c | 155 audio_dev_warn(state->cs_adev, "failed mapping auxio reg");
217 uint_t reg; local
223 reg = ddi_get32(phandle, &EB2_PLAY_CSR);
224 for (x = 0; (reg & EB2_FIFO_DRAIN) && x < CS4231_TIMEOUT; x++) {
226 reg = ddi_get32(phandle, &EB2_PLAY_CSR);
234 reg = ddi_get32(rhandle, &EB2_REC_CSR);
235 for (x = 0; (reg & EB2_FIFO_DRAIN) && x < CS4231_TIMEOUT; x++) {
237 reg = ddi_get32(rhandle, &EB2_REC_CSR);
|
| /onnv/onnv-gate/usr/src/uts/common/io/rtw/ |
| rtwphyio.c | 108 uint32_t mask, reg; local
114 reg = RTW_PHYCFG_HST;
115 RTW_WRITE(regs, RTW_PHYCFG, reg);
129 reg |= RTW_PHYCFG_HST_DATA;
131 reg &= ~RTW_PHYCFG_HST_DATA;
133 reg |= RTW_PHYCFG_HST_CLK;
134 RTW_WRITE(regs, RTW_PHYCFG, reg);
139 reg &= ~RTW_PHYCFG_HST_CLK;
140 RTW_WRITE(regs, RTW_PHYCFG, reg);
149 reg |= RTW_PHYCFG_HST_EN
301 uint32_t reg; local
[all...] |
