| /onnv/onnv-gate/usr/src/grub/grub-0.97/netboot/ |
| nic.h | 29 void (*irq)P((struct nic *, irq_action_t)); member in struct:nic
|
| pic8259.c | 16 /* Install a handler for the specified IRQ. Address of previous
18 * of IRQ will be preserved across call, therefore if the handler does
19 * chaining, ensure that either (a) IRQ is disabled before call, or
24 int install_irq_handler ( irq_t irq, segoff_t *handler,
27 segoff_t *irq_vector = IRQ_VECTOR ( irq );
28 *previously_enabled = irq_enabled ( irq );
30 if ( irq > IRQ_MAX ) {
31 DBG ( "Invalid IRQ number %d\n" );
37 if ( *previously_enabled ) disable_irq ( irq );
38 DBG ( "Installing handler at %hx:%hx for IRQ %d, leaving %s\n"
95 int irq = 0; local
[all...] |
| undi.h | 232 irq_t irq; member in struct:undi
|
| pci.h | 112 #define PCI_INTERRUPT_LINE 0x3c /* IRQ number (0-15) */
113 #define PCI_INTERRUPT_PIN 0x3d /* IRQ pin on PCI bus (A-D) */
276 unsigned char irq; member in struct:pci_device
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| /onnv/onnv-gate/usr/src/cmd/mdb/i86xpv/modules/xpv_uppc/ |
| xpv_uppc.c | 115 virq_type(int irq)
120 if (virq_tbl[i].mi_irq == irq)
143 irq_type(int irq, int extended)
145 switch (irq_tbl[irq].ii_type) {
152 return (virq_type(irq));
262 /* IRQ */
330 mdb_printf("%<u>IRQ Vect Evtchn IPL(lo/hi) Bus Type Share ");
358 int irq = evtchn_tbl[i]; local
360 if (irq == INVALID_IRQ) {
370 mdb_printf("%-14s", irq_type(irq, 1))
[all...] |
| /onnv/onnv-gate/usr/src/uts/common/io/drm/ |
| drm_pci.c | 87 int irq; local
91 irq = ddi_prop_get_int(DDI_DEV_T_ANY,
94 if (irq > 0) {
95 irq = drm_supp_get_irq(statep->drm_handle);
98 return (irq);
|
| drm_irq.c | 2 * drm_irq.c -- IRQ IOCTL and function support
46 drm_irq_busid_t irq; local
48 DRM_COPYFROM_WITH_RETURN(&irq, (void *)data, sizeof (irq));
50 if ((irq.busnum >> 8) != dev->pci_domain ||
51 (irq.busnum & 0xff) != dev->pci_bus ||
52 irq.devnum != dev->pci_slot ||
53 irq.funcnum != dev->pci_func)
56 irq.irq = dev->irq
[all...] |
| drm_sunmod.c | 926 int irq; local
931 irq = pci_config_get8(mstate->mis_cfg_hdl, PCI_CONF_ILINE);
932 return (irq);
|
| /onnv/onnv-gate/usr/src/uts/i86pc/sys/ |
| psm_common.h | 61 typedef void (*intr_exit_fn_t)(int prev_ipl, int irq);
71 * irq_cache_t: Entry for irq cache to map pci bus/dev/ipin or ACPI object
72 * referencing an interrupt link device the configured irq for the device.
79 uchar_t irq; member in struct:irq_cache
99 #define ELCR_LEVEL(elcrval, irq) (elcrval & (0x1 << irq))
100 #define ELCR_EDGE(elcrval, irq) ((elcrval & (0x1 << irq)) == 0)
119 extern int acpi_set_irq_resource(acpi_psm_lnk_t *acpipsmlnkp, int irq);
124 extern int acpi_irqlist_find_irq(acpi_irqlist_t *irqlistp, int irq,
[all...] |
| /onnv/onnv-gate/usr/src/cmd/mdb/i86xpv/modules/xpv_psm/ |
| xpv_psm.c | 120 virq_type(int irq)
125 if (virq_tbl[i].mi_irq == irq)
150 irq_type(int irq, int extended)
152 switch (irq_tbl[irq].ii_type) {
159 return (virq_type(irq));
173 * We need a non-trivial IPL lookup as the CPU poke's IRQ doesn't have ii_ipl
177 irq_ipl(int irq)
181 if (irq_tbl[irq].ii_u2.ipl != 0)
182 return (irq_tbl[irq].ii_u2.ipl);
185 if (ipi_tbl[i].mi_irq == irq) {
411 int irq = evtchn_tbl[i]; local
[all...] |
| /onnv/onnv-gate/usr/src/uts/i86pc/io/psm/ |
| psm_common.c | 47 * the reserved irq list. When 0 (false), the existing state of the ELCR
48 * is ignored when selecting a vector during IRQ translation, and the ELCR
84 * as a pci busid/devid/ipin <-> irq cache and also as a acpi
85 * interrupt lnk <-> irq cache.
118 * Get the IRQ routing table
164 * link device is already configured (i.e. found in the irq cache)
165 * we need to use the already configured irq instead of reconfiguring
196 " for device %s, instance #%d, irq no %d\n",
256 * Build the reserved ISA irq list, and store it in the table pointed to by
308 * them to the reserved irq lis
582 int irq; local
[all...] |
| uppc.c | 78 * For interrupt link devices, if uppc_unconditional_srs is set, an irq resource
80 * irq setting (via _CRS), but only if that irq is in the set of possible
87 * assigning an IRQ resource to a device, prefer the current IRQ setting
88 * over other possible irq settings under same conditions.
657 psm_set_elcr(*pci_irqp, 1); /* set IRQ to PCI mode */
660 "new irq %d for device %s, instance #%d\n",
668 * Configures the irq for the interrupt link device identified by
671 * Gets the current and the list of possible irq settings for th
703 int32_t irq; local
[all...] |
| /onnv/onnv-gate/usr/src/uts/i86xpv/io/psm/ |
| xpv_uppc.c | 61 * For interrupt link devices, if xen_uppc_unconditional_srs is set, an irq
63 * irq setting (via _CRS), but only if that irq is in the set of possible
70 * assigning an IRQ resource to a device, prefer the current IRQ setting
71 * over other possible irq settings under same conditions.
293 * unbind if no more sharers of this irq/evtchn
422 * If the clock irq is pending on this cpu then we need to
430 * Configures the irq for the interrupt link device identified by
433 * Gets the current and the list of possible irq settings for th
465 int32_t irq; local
[all...] |
| xpv_psm.c | 129 xen_psm_bind_intr(int irq)
137 if (irq <= APIC_MAX_VECTOR)
138 irqptr = apic_irq_table[irq];
350 * Acquire ownership of this irq on this cpu
353 xen_psm_acquire_irq(int irq)
359 * If the irq is currently being serviced by another cpu
365 cpuid = ec_block_irq(irq);
381 * unbind if no more sharers of this irq/evtchn
454 * Allocate an irq for inter cpu signaling
781 xen_psm_rebind_irq(int irq)
809 int irq; local
831 int irq; local
[all...] |
| /onnv/onnv-gate/usr/src/uts/common/pcmcia/cis/ |
| cis_handlers.c | 784 * Parse any IRQ information. If there is IRQ inforamtion,
789 cistpl_cftable_entry_irq_t *irq = &ce->irq; local
794 * Pass any IRQ flags that are in the tuple directly
797 irq->flags = tpce_ir;
799 * Check for and parse the extended IRQ bitmask
803 irq->irqs = GET_BYTE(tp) & 0x0ff;
804 irq->irqs |= (GET_BYTE(tp) << 8)&0x0ff00;
806 irq->irqs = (1<< (tpce_ir&0x0f))
[all...] |
| /onnv/onnv-gate/usr/src/uts/sun/io/ |
| stp4020.c | 1109 int irq = 0; local
1196 /* irq processing */
1198 /* IRQ only for I/O */
1199 irq = socket->IREQRouting & 0xF;
1201 irq = DRCTL_IOIE;
1204 irq |= DRCTL_IOILVL_SB1;
1207 irq |= DRCTL_IOILVL_SB0;
1210 irq |= DRCTL_IOILVL_SB1;
1215 irq = 0; /* no interrupts */
1223 "\tsocket type is I/O and irq %x is %s\n", irq
[all...] |
| /onnv/onnv-gate/usr/src/uts/common/io/ |
| busra.c | 762 uint32_t *irq; local
853 "interrupts", (caddr_t)&irq, &proplen) == DDI_SUCCESS) {
858 req.ra_addr = (uint64_t)irq[i];
864 kmem_free((caddr_t)irq, proplen);
[all...] |
| /onnv/onnv-gate/usr/src/uts/i86pc/io/pci/ |
| pci_common.c | 480 * For fixed interrupts, the irq may not have been
725 /* Note hdlp->ih_vector is actually an irq */
736 /* hdlp->ih_vector is actually an irq */
799 int irq; local
816 (void) (*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, &irq);
817 DDI_INTR_NEXDBG((CE_CONT, "pci_enable_intr: priority=%x irq=%x\n",
818 hdlp->ih_pri, irq));
822 DEVI(rdip)->devi_name, irq, hdlp->ih_cb_arg1,
826 /* Note this really is an irq. */
827 hdlp->ih_vector = (ushort_t)irq;
837 int irq; local
[all...] |
| /onnv/onnv-gate/usr/src/uts/common/xen/public/ |
| physdev.h | 32 * Notify end-of-interrupt (EOI) for the specified IRQ.
38 uint32_t irq; member in struct:physdev_eoi
59 * Query the status of an IRQ line.
65 uint32_t irq; member in struct:physdev_irq_status_query
72 /* Need to call PHYSDEVOP_eoi when the IRQ has been serviced? */
76 /* IRQ shared by multiple guests? */
126 * Allocate or free a physical upcall vector for the specified IRQ line.
133 uint32_t irq; member in struct:physdev_irq
|
| /onnv/onnv-gate/usr/src/uts/i86xpv/os/ |
| evtchn.c | 120 * and the IRQ for /dev/xen/evtchn. The IRQ types are:
123 * The hypervisor's standard virtual IRQ, used for the clock timer, for
129 * These associate a physical IRQ with an event channel via
133 * A cross-call IRQ. Maps to "ncpus" event channels, each of which is
143 * This is a one-time IRQ used by /dev/xen/evtchn. Unlike other IRQs, we
144 * have a one-IRQ to many-evtchn mapping. We only track evtchn->irq for
177 #define IRQ_IS_CPUPOKE(irq) (ipi_info[XC_CPUPOKE_PIL].mi_irq == (irq))
400 int irq; local
1219 int irq; local
1256 int i, j, port, pri, curpri, irq, sipri; local
[all...] |
| /onnv/onnv-gate/usr/src/uts/common/pcmcia/sys/ |
| cs_priv.h | 355 * irq_alloc_t structure used to keep track of a client's IRQ allocation
358 uint32_t Attributes; /* IRQ attribute flags */
359 uint32_t irq; /* assigned IRQ number */ member in struct:irq_alloc_t
360 uint32_t handler_id; /* IRQ handler ID for this IRQ */
375 irq_alloc_t irq_alloc; /* IRQ resource allocations */
414 #define CLIENT_IRQ_ALLOCATED 0x04000000 /* IRQ resources allocated */
|
| /onnv/onnv-gate/usr/src/uts/common/io/mega_sas/ |
| megaraid_sas.c | 298 uint8_t irq; local
398 irq = pci_config_get8(instance->pci_handle,
402 "0x%x:0x%x 0x%x:0x%x, irq:%d drv-ver:%s\n",
404 subsysid, irq, MEGASAS_VERSION));
[all...] |
| /onnv/onnv-gate/usr/src/uts/i86pc/io/pcplusmp/ |
| apic.c | 649 int irq = apic_get_ipivect(ipl, -1); local
651 ASSERT(irq != -1);
653 apic_irq_table[irq]->airq_vector;
657 "apic pcint", irq, NULL, NULL, NULL, NULL);
685 int irq = apic_get_ipivect(ipl, -1); local
687 ASSERT(irq != -1);
688 apic_errvect = apic_irq_table[irq]->airq_vector;
696 irq, NULL, NULL, NULL, NULL);
717 int irq = apic_get_ipivect(ipl, -1); local
719 ASSERT(irq != -1)
919 int irq; local
1464 int irq; local
1484 int irq; local
2145 int irq; local
[all...] |
| /onnv/onnv-gate/usr/src/uts/common/io/mr_sas/ |
| mr_sas.c | 258 uint8_t irq; local
360 irq = pci_config_get8(instance->pci_handle,
364 "0x%x:0x%x 0x%x:0x%x, irq:%d drv-ver:%s",
366 subsysid, irq, MRSAS_VERSION));
[all...] |
| /onnv/onnv-gate/usr/src/uts/common/io/pcan/ |
| pcan.c | 722 irq_req_t irq; local
828 irq.Attributes = IRQ_TYPE_EXCLUSIVE;
829 irq.irq_handler = ddi_intr_hilevel(DIP(pcan_p), 0) ?
831 irq.irq_handler_arg = pcan_p;
832 if (ret = csx_RequestIRQ(chdl, &irq)) {
881 (void) csx_ReleaseIRQ(chdl, &irq);
927 irq_req_t irq; local
951 bzero(&irq, sizeof (irq));
952 if (ret = csx_ReleaseIRQ(pcan_p->pcan_chdl, &irq))
[all...] |
